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Mon, 14 Mar 2016 08:03:44 +0000 Received: from victor.ap.freescale.net (victor.ap.freescale.net [10.192.241.62]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id u2E83aDE021368; Mon, 14 Mar 2016 01:03:42 -0700 From: Liu Ying To: Subject: [PATCH 4/4] drm/imx: ipuv3-plane: Configure DMFC wait4eot bit after slots are determined Date: Mon, 14 Mar 2016 16:10:11 +0800 Message-ID: <1457943011-20542-4-git-send-email-gnuiyl@gmail.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1457943011-20542-1-git-send-email-gnuiyl@gmail.com> References: <1457943011-20542-1-git-send-email-gnuiyl@gmail.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131024162251123991; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(189002)(199003)(1220700001)(1096002)(55446002)(5003940100001)(229853001)(2351001)(106466001)(110136002)(11100500001)(77096005)(82202001)(81166005)(6260500002)(92566002)(33646002)(104016004)(36756003)(105596002)(50466002)(76482005)(50226001)(189998001)(2906002)(586003)(6806005)(5008740100001)(47776003)(73972006)(19580395003)(4326007)(2950100001)(86362001)(87936001)(73392002)(81442002)(76176999)(50986999)(87572001)(48376002)(83322999)(42413003)(32563001); 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SN1PR0301MB1600; 5:cvuTHWrGA1JUpW5hHTxKcsZt1WmmDso7vu/1s+X4aCl0BqTqWoALcwUM/EKuMv6Hy2YsU57oAi6GOufl1yjv9+WJTkIdoJAjhGTnyuFBHxIeEq1T9kfF3XifPj5wIllHftrvPBj3/DVxssIHzjLSLTWk19qut2zydl4j1NdaNI0=; 24:BShEi4ghjVFX1cGASG1aTumSXUUBKJxh+zvlaj07klrGsHCUTW8rgrn4NFlcQ5Aplpz23BYmlPGg6B5xoJ53JktiX8H+6/nN8jZt2eK4EL4= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Mar 2016 08:03:44.8627 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR0301MB1600 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAD_ENC_HEADER,BAYES_00, DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Just as the function ipu_dmfc_config_wait4eot() tells, the DMFC wait4eot bit depends on the number of DMFC slots to be used, so it should be called after the slots are determined in the function ipu_dmfc_alloc_bandwidth(). Based on tests, this patch may eliminate display distortion issue on overlay plane with small resolutions. To reproduce the issue, we may run this drm modetest case - 'modetest -P 19:64x64'. Signed-off-by: Liu Ying --- drivers/gpu/drm/imx/ipuv3-plane.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index cab8a45..afec9f6 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -200,8 +200,6 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, } } - ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w); - ret = ipu_dmfc_alloc_bandwidth(ipu_plane->dmfc, calc_bandwidth(crtc_w, crtc_h, calc_vref(mode)), 64); @@ -210,6 +208,8 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, return ret; } + ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w); + ipu_cpmem_zero(ipu_plane->ipu_ch); ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h); ret = ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->pixel_format);