From patchwork Wed Mar 23 13:15:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 8649871 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DBF879F36E for ; Wed, 23 Mar 2016 13:17:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0954C2038D for ; Wed, 23 Mar 2016 13:17:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2BB8B2037F for ; Wed, 23 Mar 2016 13:17:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 013A46E84E; Wed, 23 Mar 2016 13:16:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 02E3B6E84C for ; Wed, 23 Mar 2016 13:15:37 +0000 (UTC) Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O4H00CTEU5WNN90@mailout1.w1.samsung.com> for dri-devel@lists.freedesktop.org; Wed, 23 Mar 2016 13:15:32 +0000 (GMT) X-AuditID: cbfec7f4-f796c6d000001486-6b-56f296f48a11 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id C2.BC.05254.4F692F65; Wed, 23 Mar 2016 13:15:32 +0000 (GMT) Received: from amdc1061.digital.local ([106.116.147.88]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O4H00DL6U5VU620@eusync1.samsung.com>; Wed, 23 Mar 2016 13:15:32 +0000 (GMT) From: Andrzej Hajda To: Inki Dae Subject: [PATCH 1/7] drm/exynos/hdmi: fix PHY configuration sequence Date: Wed, 23 Mar 2016 14:15:12 +0100 Message-id: <1458738918-32054-2-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1458738918-32054-1-git-send-email-a.hajda@samsung.com> References: <1458738918-32054-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmphluLIzCtJLcpLzFFi42I5/e/4Zd0v0z6FGextFLS4te4cq8XGGetZ La58fc9mMen+BBaLGef3MVmsPXKX3YHN4373cSaPvi2rGD0+b5ILYI7isklJzcksSy3St0vg ylj5opW5oE+o4vvzxSwNjDP5uxg5OSQETCSOrnnEDmGLSVy4t54NxBYSWMoo8eoVdxcjF5Dd xCTRcmsDK0iCTUBT4u/mm2BFIgLKEqv2tbODFDELbGSSaJ50hhEkISzgInFxVRdQAwcHi4Cq xMY3piBhXgFnicM9m1kglslJnDw2GWwmJ1D5/uOvoBY7S/y4s5VpAiPvAkaGVYyiqaXJBcVJ 6bmGesWJucWleel6yfm5mxghYfNlB+PiY1aHGAU4GJV4eCXOfAwTYk0sK67MPcQowcGsJMIr OfVTmBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHeubvehwgJpCeWpGanphakFsFkmTg4pRoYYz8K amutma/av8HD/ekcNolJk9WiDWYUivuum2/87sem/Vs3qPd8aHVMK9vkzci8syCvcEVv6V6f qpoXU0o3Kb1Ze4/F/wqT9YfYuf21bf33zEIr3XmTH6guuSGguExjbkrJj1eHH1mlr3PV2vFQ Qe39lLfPtmvVvD/Pc3Y9r1LRSfkExwtGSizFGYmGWsxFxYkARMFpYhcCAAA= Cc: Andrzej Hajda , linux-samsung-soc@vger.kernel.org, Marek Szyprowski , "open list:DRM DRIVERS FOR EXYNOS" , Bartlomiej Zolnierkiewicz X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Proper PHY configuration should be as follow: 1. set HDMI clock parents to OSCCLK. 2. reconfigure PHY. 3. set HDMI clock parents to PHY. 4. wait for PLL stabilization. The patch fixes it and consolidates the code. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/exynos/exynos_hdmi.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 839ad70..5c7dbfc 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1657,15 +1657,11 @@ static void hdmi_mode_apply(struct hdmi_context *hdata) else hdmi_v14_mode_apply(hdata); - hdmiphy_wait_for_pll(hdata); - hdmi_clk_set_parents(hdata, true); hdmi_start(hdata, true); } static void hdmiphy_conf_reset(struct hdmi_context *hdata) { - hdmi_clk_set_parents(hdata, false); - hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT); usleep_range(10000, 12000); hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT); @@ -1683,29 +1679,33 @@ static void hdmiphy_enable_mode_set(struct hdmi_context *hdata, bool enable) static void hdmiphy_conf_apply(struct hdmi_context *hdata) { int ret; - int i; + const u8 *phy_conf; - i = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000); - if (i < 0) { + ret = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000); + if (ret < 0) { DRM_ERROR("failed to find hdmiphy conf\n"); return; } + phy_conf = hdata->drv_data->phy_confs.data[ret].conf; + + hdmi_clk_set_parents(hdata, false); + + hdmiphy_conf_reset(hdata); hdmiphy_enable_mode_set(hdata, true); - ret = hdmiphy_reg_write_buf(hdata, 0, - hdata->drv_data->phy_confs.data[i].conf, 32); + ret = hdmiphy_reg_write_buf(hdata, 0, phy_conf, 32); if (ret) { DRM_ERROR("failed to configure hdmiphy\n"); return; } hdmiphy_enable_mode_set(hdata, false); - + hdmi_clk_set_parents(hdata, true); usleep_range(10000, 12000); + hdmiphy_wait_for_pll(hdata); } static void hdmi_conf_apply(struct hdmi_context *hdata) { - hdmiphy_conf_reset(hdata); hdmiphy_conf_apply(hdata); hdmi_start(hdata, false); hdmi_conf_init(hdata);