From patchwork Wed Mar 23 17:42:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 8652961 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 07423C0553 for ; Wed, 23 Mar 2016 17:45:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 18F09203EB for ; Wed, 23 Mar 2016 17:45:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 21301203DB for ; Wed, 23 Mar 2016 17:45:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C0FDA6E910; Wed, 23 Mar 2016 17:44:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qg0-x22b.google.com (mail-qg0-x22b.google.com [IPv6:2607:f8b0:400d:c04::22b]) by gabe.freedesktop.org (Postfix) with ESMTPS id 46E666E8EA for ; Wed, 23 Mar 2016 17:43:55 +0000 (UTC) Received: by mail-qg0-x22b.google.com with SMTP id u110so18141441qge.3 for ; Wed, 23 Mar 2016 10:43:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9l8Jg2FR6JXcQ93yMAgqxCrvw0gxpQPWYrOvuTDxIyU=; b=mZk/Nu+7t3sauXMjQD1gh4QS0XDkwz4UYTyD+pNWFgF2h/eTIAyYnbq7TFhnBx6R2c HcwNnmfRSDsnwxlS3Y0ZJFgTDSoZRw8hfWya03zCDxLG0Q7nbd/wpTAifi4Cd+0CLQT5 tb1dlGy2abvapKFrRnd9BxvGQeFdtw4cSCdwwu3Tt0U/bPGpBQF8fRYg+Rq+ua/SsVXG s59XC+CmXVaTJYfe9CfG/z8dSHLgilD67KUUxzzpZTq1IJ9BXUXAptD6SzAKaT3UJPen COume9Nrz5ssAh6eHTnGfLJv3GKq1l+/RdEwt77EiS+ee65ge4ZATZXyIIh0eQjNStC+ LwCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9l8Jg2FR6JXcQ93yMAgqxCrvw0gxpQPWYrOvuTDxIyU=; b=cC+hZDW9m3w6D2qp3ITyLh+yucxfankIhaCAfDSXNcMP6LXPcblhkde5s12RXgUmXZ YGRx8YboKjk7Wkc31N6iawO2e4HMcXz2TnxpxuZYGJyKc9DpgiQFKrI9QE0aokV90wiz N89lO/83FPiSNxcPOfF4d6QXce/UTXUwDhIRKMz8zlVGCx8UGXW/nZ9kn18uTQuKUjVL PGcs66lZ2NHPvP8cdS6WDYWuEd0N2X/Kd5p1aJZTS4Pv0/0oVRXUc9Q99yfrxnPzkoNu kqdCRtDwwWkZPHSAah9dekEgd3DrvhPp0nR+edaxNvsVPhBMBnYzbGBmKdcKoAv+OqoW Cl3A== X-Gm-Message-State: AD7BkJLkJGVHMVNGkFqVSPTerNqAz2cIneWHMJ8lnM27sVziED4eqc4yzARF0jHcCbMNbw== X-Received: by 10.140.27.132 with SMTP id 4mr5324677qgx.6.1458755032887; Wed, 23 Mar 2016 10:43:52 -0700 (PDT) Received: from cm.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by smtp.gmail.com with ESMTPSA id v190sm1486878qka.46.2016.03.23.10.43.52 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 23 Mar 2016 10:43:52 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: dri-devel@lists.freedesktop.org Subject: [PATCH 40/52] drm/amdgpu: update the core VI support for ELM/BAF Date: Wed, 23 Mar 2016 13:42:56 -0400 Message-Id: <1458754988-16222-41-git-send-email-alexander.deucher@amd.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1458754988-16222-1-git-send-email-alexander.deucher@amd.com> References: <1458754988-16222-1-git-send-email-alexander.deucher@amd.com> Cc: Flora Cui X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Flora Cui Signed-off-by: Flora Cui Reviewed-by: Jammy Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 + drivers/gpu/drm/amd/amdgpu/vi.c | 87 ++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index e0c2e99..79a3e32 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1152,6 +1152,8 @@ static int amdgpu_early_init(struct amdgpu_device *adev) case CHIP_TOPAZ: case CHIP_TONGA: case CHIP_FIJI: + case CHIP_BAFFIN: + case CHIP_ELLESMERE: case CHIP_CARRIZO: case CHIP_STONEY: if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 328707c..f554c7f 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -277,6 +277,8 @@ static void vi_init_golden_registers(struct amdgpu_device *adev) stoney_mgcg_cgcg_init, (const u32)ARRAY_SIZE(stoney_mgcg_cgcg_init)); break; + case CHIP_BAFFIN: + case CHIP_ELLESMERE: default: break; } @@ -538,6 +540,8 @@ static int vi_read_register(struct amdgpu_device *adev, u32 se_num, break; case CHIP_FIJI: case CHIP_TONGA: + case CHIP_BAFFIN: + case CHIP_ELLESMERE: case CHIP_CARRIZO: case CHIP_STONEY: asic_register_table = cz_allowed_read_registers; @@ -908,6 +912,74 @@ static const struct amdgpu_ip_block_version fiji_ip_blocks[] = }, }; +static const struct amdgpu_ip_block_version baffin_ip_blocks[] = +{ + /* ORDER MATTERS! */ + { + .type = AMD_IP_BLOCK_TYPE_COMMON, + .major = 2, + .minor = 0, + .rev = 0, + .funcs = &vi_common_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_GMC, + .major = 8, + .minor = 1, + .rev = 0, + .funcs = &gmc_v8_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_IH, + .major = 3, + .minor = 1, + .rev = 0, + .funcs = &tonga_ih_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_SMC, + .major = 7, + .minor = 2, + .rev = 0, + .funcs = &amdgpu_pp_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_DCE, + .major = 11, + .minor = 2, + .rev = 0, + .funcs = &dce_v11_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_GFX, + .major = 8, + .minor = 0, + .rev = 0, + .funcs = &gfx_v8_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_SDMA, + .major = 3, + .minor = 1, + .rev = 0, + .funcs = &sdma_v3_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_UVD, + .major = 6, + .minor = 3, + .rev = 0, + .funcs = &uvd_v6_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_VCE, + .major = 3, + .minor = 4, + .rev = 0, + .funcs = &vce_v3_0_ip_funcs, + }, +}; + static const struct amdgpu_ip_block_version cz_ip_blocks[] = { /* ORDER MATTERS! */ @@ -1239,6 +1311,11 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) adev->num_ip_blocks = ARRAY_SIZE(tonga_ip_blocks); #endif break; + case CHIP_BAFFIN: + case CHIP_ELLESMERE: + adev->ip_blocks = baffin_ip_blocks; + adev->num_ip_blocks = ARRAY_SIZE(baffin_ip_blocks); + break; case CHIP_CARRIZO: case CHIP_STONEY: #if defined(CONFIG_DRM_AMD_DAL) @@ -1335,6 +1412,16 @@ static int vi_common_early_init(void *handle) adev->pg_flags = 0; adev->external_rev_id = adev->rev_id + 0x14; break; + case CHIP_BAFFIN: + adev->cg_flags = 0; + adev->pg_flags = 0; + adev->external_rev_id = adev->rev_id + 0x5A; + break; + case CHIP_ELLESMERE: + adev->cg_flags = 0; + adev->pg_flags = 0; + adev->external_rev_id = adev->rev_id + 0x50; + break; case CHIP_CARRIZO: case CHIP_STONEY: adev->cg_flags = 0;