diff mbox

[46/52] drm/amd/powerplay: enable set lowest mclk clock on baffin.

Message ID 1458754988-16222-47-git-send-email-alexander.deucher@amd.com (mailing list archive)
State New, archived
Headers show

Commit Message

Alex Deucher March 23, 2016, 5:43 p.m. UTC 
From: Rex Zhu <Rex.Zhu@amd.com>

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
index 446ed72..b77d7aa 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
@@ -3136,7 +3136,7 @@  static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr)
 							    (1 << level));
 
 	}
-/* uvd is enabled, can't set mclk low right now
+
 	if (!data->mclk_dpm_key_disabled) {
 		if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) {
 			level = phm_get_lowest_enabled_level(hwmgr,
@@ -3146,7 +3146,7 @@  static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr)
 							    (1 << level));
 		}
 	}
-*/
+
 	if (!data->pcie_dpm_key_disabled) {
 		if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) {
 			level = phm_get_lowest_enabled_level(hwmgr,