From patchwork Mon May 16 13:19:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 9110331 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E91BEBF29F for ; Tue, 17 May 2016 08:08:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1EA0F202E5 for ; Tue, 17 May 2016 08:08:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4A1B5201CD for ; Tue, 17 May 2016 08:08:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6CB4C6E259; Tue, 17 May 2016 08:08:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 977E56E42E; Mon, 16 May 2016 13:19:46 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 16 May 2016 06:19:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,627,1455004800"; d="scan'208";a="982011254" Received: from sorvi.fi.intel.com ([10.237.72.50]) by fmsmga002.fm.intel.com with ESMTP; 16 May 2016 06:19:45 -0700 From: Mika Kahola To: dri-devel@lists.freedesktop.org Subject: [PATCH v2 3/7] drm: Read DPCD receiver capability for DP to DVI converter Date: Mon, 16 May 2016 16:19:29 +0300 Message-Id: <1463404773-5167-4-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463404773-5167-1-git-send-email-mika.kahola@intel.com> References: <1463404773-5167-1-git-send-email-mika.kahola@intel.com> X-Mailman-Approved-At: Tue, 17 May 2016 08:08:36 +0000 Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org, jim.bish@intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Read from DPCD receiver capability field for the following features: - max TMDS clock rate - max bits per component - single or dual link support - high color depth support Signed-off-by: Mika Kahola --- drivers/gpu/drm/drm_dp_helper.c | 5 +++++ include/drm/drm_dp_helper.h | 14 ++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index c5bec6f..f5cf706 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -451,6 +451,11 @@ int drm_dp_bd(struct drm_dp_aux *aux, struct drm_dp_bd *bd) if (bd->type & DP_DS_PORT_TYPE_VGA) { bd->dfp.vga.dot_clk = info[1] * 8 * 1000; bd->dfp.vga.bpc = info[2] & DP_DS_VGA_MAX_BPC_MASK; + } else if (bd->type & DP_DS_PORT_TYPE_DVI) { + bd->dfp.dvi.tmds_clk = info[1] * 2500; + bd->dfp.dvi.bpc = info[2] & DP_DS_VGA_MAX_BPC_MASK; + bd->dfp.dvi.dual_link = info[3] & DP_DS_DVI_DUAL_LINK; + bd->dfp.dvi.hi_color_depth = info[3] & DP_DS_DVI_HI_COLOR_DEPTH; } } diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index fe6cfdc..da82459 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -220,6 +220,9 @@ # define DP_DS_VGA_10BPC 1 # define DP_DS_VGA_12BPC 2 # define DP_DS_VGA_16BPC 3 +/* offset 3 for DVI dual link and high color depth */ +# define DP_DS_DVI_DUAL_LINK (1<<1) +# define DP_DS_DVI_HI_COLOR_DEPTH (1<<2) /* link configuration */ #define DP_LINK_BW_SET 0x100 @@ -810,6 +813,16 @@ struct drm_dp_vga { }; /* + * DP to DVI + */ +struct drm_dp_dvi { + int tmds_clk; + uint8_t bpc; + bool dual_link; + bool hi_color_depth; +}; + +/* * Branch device */ struct drm_dp_bd { @@ -818,6 +831,7 @@ struct drm_dp_bd { bool hpd; union { struct drm_dp_vga vga; + struct drm_dp_dvi dvi; } dfp; };