From patchwork Wed May 18 15:01:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 9120231 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B9048BF29F for ; Wed, 18 May 2016 15:02:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D32F120357 for ; Wed, 18 May 2016 15:02:17 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BA57820373 for ; Wed, 18 May 2016 15:02:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F00056E41C; Wed, 18 May 2016 15:02:10 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7334B6E31D for ; Wed, 18 May 2016 15:02:05 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u4IF22iC000867; Wed, 18 May 2016 10:02:02 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4IF22oS006435; Wed, 18 May 2016 10:02:02 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Wed, 18 May 2016 10:02:01 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4IF1W8X018729; Wed, 18 May 2016 10:02:01 -0500 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCH 21/24] drm/omap: generalize dss_pll_calc_b() Date: Wed, 18 May 2016 18:01:23 +0300 Message-ID: <1463583686-24964-22-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1463583686-24964-1-git-send-email-tomi.valkeinen@ti.com> References: <1463583686-24964-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Cc: Tomi Valkeinen X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP dss_pll_calc_b() takes HDMI TMDS clock rate as a parameter. To make dss_pll_calc_b() usable for non-HDMI users, change the function to take clkout rate as parameter, and also change the current users of dss_pll_calc_b() to accommodate that. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/dss/dss.h | 2 +- drivers/gpu/drm/omapdrm/dss/hdmi4.c | 3 +++ drivers/gpu/drm/omapdrm/dss/hdmi5.c | 3 +++ drivers/gpu/drm/omapdrm/dss/pll.c | 17 ++++++++++------- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 11d9805e3ac3..4fd06dc41cb3 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -443,7 +443,7 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, dss_pll_calc_func func, void *data); bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, - unsigned long target_tmds, struct dss_pll_clock_info *cinfo); + unsigned long target_clkout, struct dss_pll_clock_info *cinfo); int dss_pll_write_config_type_a(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo); diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c b/drivers/gpu/drm/omapdrm/dss/hdmi4.c index eaf2bd6ffe7d..b1a8926c5b81 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c @@ -186,6 +186,9 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) if (p->double_pixel) pc *= 2; + /* DSS_HDMI_TCLK is bitclk / 10 */ + pc *= 10; + dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin), pc, &hdmi_cinfo); diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c b/drivers/gpu/drm/omapdrm/dss/hdmi5.c index 435061475c30..33998f7f51ab 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c @@ -198,6 +198,9 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) if (p->double_pixel) pc *= 2; + /* DSS_HDMI_TCLK is bitclk / 10 */ + pc *= 10; + dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin), pc, &hdmi_cinfo); diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c b/drivers/gpu/drm/omapdrm/dss/pll.c index bdfc88a7caaf..6daf7bc3a67a 100644 --- a/drivers/gpu/drm/omapdrm/dss/pll.c +++ b/drivers/gpu/drm/omapdrm/dss/pll.c @@ -248,18 +248,21 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, return false; } +/* + * This calculates a PLL config that will provide the target_clkout rate + * for clkout. Additionally clkdco rate will be the same as clkout rate + * when clkout rate is >= min_clkdco. + */ bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, - unsigned long target_tmds, struct dss_pll_clock_info *cinfo) + unsigned long target_clkout, struct dss_pll_clock_info *cinfo) { unsigned long fint, clkdco, clkout; - unsigned long target_bitclk, target_clkdco; + unsigned long target_clkdco; unsigned long min_dco; unsigned n, m, mf, m2, sd; const struct dss_pll_hw *hw = pll->hw; - DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds); - - target_bitclk = target_tmds * 10; + DSSDBG("clkin %lu, target clkout %lu\n", clkin, target_clkout); /* Fint */ n = DIV_ROUND_UP(clkin, hw->fint_max); @@ -267,11 +270,11 @@ bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, /* adjust m2 so that the clkdco will be high enough */ min_dco = roundup(hw->clkdco_min, fint); - m2 = DIV_ROUND_UP(min_dco, target_bitclk); + m2 = DIV_ROUND_UP(min_dco, target_clkout); if (m2 == 0) m2 = 1; - target_clkdco = target_bitclk * m2; + target_clkdco = target_clkout * m2; m = target_clkdco / fint; clkdco = fint * m;