Message ID | 1466165027-17917-12-git-send-email-jonathanh@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: > Add node for SOR power-domain for Tegra210 and populate the SOR > power-domain phandle for SOR and DPAUX nodes that are dependent > on this power-domain. > > Please note that although neither the SOR or DPAUX drivers currently > support runtime power-management, by populating the power-domain node > the SOR power-domain will be turned on before probing SOR or DPAUX > devices and kept on while the devices are bound. > > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) I've got patches queued in my drm-tegra tree to add support for runtime PM for the SOR driver. Will that in some way clash with this work if merged in parallel? Thierry
On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: > Add node for SOR power-domain for Tegra210 and populate the SOR > power-domain phandle for SOR and DPAUX nodes that are dependent > on this power-domain. > > Please note that although neither the SOR or DPAUX drivers currently > support runtime power-management, by populating the power-domain node > the SOR power-domain will be turned on before probing SOR or DPAUX > devices and kept on while the devices are bound. > > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > index ebf44f4059f8..94f780b43037 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > @@ -34,6 +34,7 @@ > clock-names = "dpaux", "parent"; > resets = <&tegra_car 207>; > reset-names = "dpaux"; > + power-domains = <&pd_sor>; > status = "disabled"; > }; > > @@ -154,6 +155,7 @@ > clock-names = "sor", "parent", "dp", "safe"; > resets = <&tegra_car 182>; > reset-names = "sor"; > + power-domains = <&pd_sor>; > status = "disabled"; > }; > > @@ -168,6 +170,7 @@ > clock-names = "sor", "parent", "dp", "safe"; > resets = <&tegra_car 183>; > reset-names = "sor"; > + power-domains = <&pd_sor>; > status = "disabled"; > }; > > @@ -180,6 +183,7 @@ > clock-names = "dpaux", "parent"; > resets = <&tegra_car 181>; > reset-names = "dpaux"; > + power-domains = <&pd_sor>; > status = "disabled"; > }; > > @@ -592,6 +596,20 @@ > resets = <&tegra_car 198>; > #power-domain-cells = <0>; > }; > + > + pd_sor: sor { > + clocks = <&tegra_car TEGRA210_CLK_SOR0>, > + <&tegra_car TEGRA210_CLK_DSIA>, > + <&tegra_car TEGRA210_CLK_DSIB>, > + <&tegra_car TEGRA210_CLK_MIPI_CAL>, Does this mean that all of these clocks will be running while the SOR partition is enabled? Seems like a waste because we rarely need MIPI_CAL and DSIA and DSIB are completely unused on boards that for example have only an HDMI output. I vaguely remember the power domain driver only making sure these are enabled during the partition power transitions, so perhaps my concerns aren't justified? Thierry
On 17/06/16 17:42, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: >> Add node for SOR power-domain for Tegra210 and populate the SOR >> power-domain phandle for SOR and DPAUX nodes that are dependent >> on this power-domain. >> >> Please note that although neither the SOR or DPAUX drivers currently >> support runtime power-management, by populating the power-domain node >> the SOR power-domain will be turned on before probing SOR or DPAUX >> devices and kept on while the devices are bound. >> >> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> >> --- >> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) > > I've got patches queued in my drm-tegra tree to add support for runtime > PM for the SOR driver. Will that in some way clash with this work if > merged in parallel? Yes I had seen those. I was wondering if I should include them here but opted not too (as it was becoming a massive series). It should be fine to enable RPM later, you just need to be aware that the partition could turn off on a RPM put so you just need to ensure that any register context is saved and restored. By the way, one item I am not certain about is the relationship between the HDMI device and the SOR device. If the HDMI is in the SOR partition it should also have the SOR power-domain populated, but it just uses the SOR, then the SOR driver should handle this. Cheers Jon
On 17/06/16 17:44, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: >> Add node for SOR power-domain for Tegra210 and populate the SOR >> power-domain phandle for SOR and DPAUX nodes that are dependent >> on this power-domain. >> >> Please note that although neither the SOR or DPAUX drivers currently >> support runtime power-management, by populating the power-domain node >> the SOR power-domain will be turned on before probing SOR or DPAUX >> devices and kept on while the devices are bound. >> >> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> >> --- >> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi >> index ebf44f4059f8..94f780b43037 100644 >> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi >> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi >> @@ -34,6 +34,7 @@ >> clock-names = "dpaux", "parent"; >> resets = <&tegra_car 207>; >> reset-names = "dpaux"; >> + power-domains = <&pd_sor>; >> status = "disabled"; >> }; >> >> @@ -154,6 +155,7 @@ >> clock-names = "sor", "parent", "dp", "safe"; >> resets = <&tegra_car 182>; >> reset-names = "sor"; >> + power-domains = <&pd_sor>; >> status = "disabled"; >> }; >> >> @@ -168,6 +170,7 @@ >> clock-names = "sor", "parent", "dp", "safe"; >> resets = <&tegra_car 183>; >> reset-names = "sor"; >> + power-domains = <&pd_sor>; >> status = "disabled"; >> }; >> >> @@ -180,6 +183,7 @@ >> clock-names = "dpaux", "parent"; >> resets = <&tegra_car 181>; >> reset-names = "dpaux"; >> + power-domains = <&pd_sor>; >> status = "disabled"; >> }; >> >> @@ -592,6 +596,20 @@ >> resets = <&tegra_car 198>; >> #power-domain-cells = <0>; >> }; >> + >> + pd_sor: sor { >> + clocks = <&tegra_car TEGRA210_CLK_SOR0>, >> + <&tegra_car TEGRA210_CLK_DSIA>, >> + <&tegra_car TEGRA210_CLK_DSIB>, >> + <&tegra_car TEGRA210_CLK_MIPI_CAL>, > > Does this mean that all of these clocks will be running while the SOR > partition is enabled? Seems like a waste because we rarely need MIPI_CAL > and DSIA and DSIB are completely unused on boards that for example have > only an HDMI output. > > I vaguely remember the power domain driver only making sure these are > enabled during the partition power transitions, so perhaps my concerns > aren't justified? Right, these are only enabled during the transition of the partition. So the SOR driver still needs to enable the clocks it needs. Cheers Jon
On Mon, Jun 20, 2016 at 10:18:42AM +0100, Jon Hunter wrote: > > On 17/06/16 17:42, Thierry Reding wrote: > > * PGP Signed by an unknown key > > > > On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: > >> Add node for SOR power-domain for Tegra210 and populate the SOR > >> power-domain phandle for SOR and DPAUX nodes that are dependent > >> on this power-domain. > >> > >> Please note that although neither the SOR or DPAUX drivers currently > >> support runtime power-management, by populating the power-domain node > >> the SOR power-domain will be turned on before probing SOR or DPAUX > >> devices and kept on while the devices are bound. > >> > >> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > >> --- > >> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++ > >> 1 file changed, 18 insertions(+) > > > > I've got patches queued in my drm-tegra tree to add support for runtime > > PM for the SOR driver. Will that in some way clash with this work if > > merged in parallel? > > Yes I had seen those. I was wondering if I should include them here but > opted not too (as it was becoming a massive series). It should be fine > to enable RPM later, you just need to be aware that the partition could > turn off on a RPM put so you just need to ensure that any register > context is saved and restored. This doesn't matter much for Tegra DRM because we always program the entire set of registers after pm_runtime_get(), which already resets the IP block anyway. > By the way, one item I am not certain about is the relationship between > the HDMI device and the SOR device. If the HDMI is in the SOR partition > it should also have the SOR power-domain populated, but it just uses the > SOR, then the SOR driver should handle this. On Tegra210 the HDMI output is driven by the SOR, and that's implemented by the SOR driver, too, so the partition setup should be correct already. On Tegra124 and earlier the HDMI output is driven by a separate IP block that's not at all related to SOR, and I haven't found any evidence that it would be in the SOR power partition either. Thierry
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index ebf44f4059f8..94f780b43037 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -34,6 +34,7 @@ clock-names = "dpaux", "parent"; resets = <&tegra_car 207>; reset-names = "dpaux"; + power-domains = <&pd_sor>; status = "disabled"; }; @@ -154,6 +155,7 @@ clock-names = "sor", "parent", "dp", "safe"; resets = <&tegra_car 182>; reset-names = "sor"; + power-domains = <&pd_sor>; status = "disabled"; }; @@ -168,6 +170,7 @@ clock-names = "sor", "parent", "dp", "safe"; resets = <&tegra_car 183>; reset-names = "sor"; + power-domains = <&pd_sor>; status = "disabled"; }; @@ -180,6 +183,7 @@ clock-names = "dpaux", "parent"; resets = <&tegra_car 181>; reset-names = "dpaux"; + power-domains = <&pd_sor>; status = "disabled"; }; @@ -592,6 +596,20 @@ resets = <&tegra_car 198>; #power-domain-cells = <0>; }; + + pd_sor: sor { + clocks = <&tegra_car TEGRA210_CLK_SOR0>, + <&tegra_car TEGRA210_CLK_DSIA>, + <&tegra_car TEGRA210_CLK_DSIB>, + <&tegra_car TEGRA210_CLK_MIPI_CAL>, + <&tegra_car TEGRA210_CLK_DPAUX>; + resets = <&tegra_car TEGRA210_CLK_SOR0>, + <&tegra_car TEGRA210_CLK_DSIA>, + <&tegra_car TEGRA210_CLK_DSIB>, + <&tegra_car TEGRA210_CLK_DPAUX>, + <&tegra_car TEGRA210_CLK_MIPI_CAL>; + #power-domain-cells = <0>; + }; }; };
Add node for SOR power-domain for Tegra210 and populate the SOR power-domain phandle for SOR and DPAUX nodes that are dependent on this power-domain. Please note that although neither the SOR or DPAUX drivers currently support runtime power-management, by populating the power-domain node the SOR power-domain will be turned on before probing SOR or DPAUX devices and kept on while the devices are bound. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)