From patchwork Thu Jun 23 14:13:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 9195263 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ED9E56077D for ; Thu, 23 Jun 2016 14:14:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD09B1FFC9 for ; Thu, 23 Jun 2016 14:14:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D1C7128169; Thu, 23 Jun 2016 14:14:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 61CBF1FFC9 for ; Thu, 23 Jun 2016 14:14:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D52B26E94B; Thu, 23 Jun 2016 14:14:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2F03A6E8E9 for ; Thu, 23 Jun 2016 14:14:26 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 280D861385; Thu, 23 Jun 2016 14:14:26 +0000 (UTC) Received: from localhost (unknown [202.46.23.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5650361368; Thu, 23 Jun 2016 14:14:24 +0000 (UTC) From: Archit Taneja To: robdclark@gmail.com Subject: [PATCH v2 11/25] drm/msm: Call pm_runtime_enable/disable for newly created devices Date: Thu, 23 Jun 2016 19:43:16 +0530 Message-Id: <1466691210-22779-12-git-send-email-architt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1466691210-22779-1-git-send-email-architt@codeaurora.org> References: <1466077007-26792-1-git-send-email-architt@codeaurora.org> <1466691210-22779-1-git-send-email-architt@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP With the new device hierarchy for MDP5, we need to enable runtime PM for both the toplevel MDSS device and the MDP5 device itself. Enable runtime PM for the new devices. Since MDP4 and MDP5 now have different places where runtime PM is enabled, remove the previous pm_runtime_enable/disable calls, and squash them in the respective kms drivers. The new device hierarchy (as expressed in the DT bindings) has the GDSC tied only to the MDSS wrapper device. This GDSC needs to be enabled for accessing any register in the MDSS sub-blocks. Once every driver is runtime adapted, the GDSC will be enabled when any sub-block device calls runtime_get because of the parent-child relationship with MDSS. Until then, we call pm_runtime_get_sync() once for the MDSS device to ensure the GDSC is never disabled. This will be removed once all the drivers are runtime PM adapted. The error handling paths become a bit tricky when we call these runtime PM funcs. There doesn't seem to be any helper that checks if runtime PM is enabled already. Add bool variables in mdp4_kms/mdp5_kms structs to check if the driver had managed to call pm_runtime_enable before bailing out. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 8 ++++++++ drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h | 2 ++ drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 6 ++++++ drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 2 ++ drivers/gpu/drm/msm/mdp/mdp5/mdp5_mdss.c | 12 ++++++++++++ drivers/gpu/drm/msm/msm_drv.c | 5 +---- 6 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c index 0e751c0..70b96bb 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c @@ -158,6 +158,7 @@ static const char * const iommu_ports[] = { static void mdp4_destroy(struct msm_kms *kms) { struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); + struct device *dev = mdp4_kms->dev->dev; struct msm_mmu *mmu = mdp4_kms->mmu; if (mmu) { @@ -169,6 +170,10 @@ static void mdp4_destroy(struct msm_kms *kms) msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id); if (mdp4_kms->blank_cursor_bo) drm_gem_object_unreference_unlocked(mdp4_kms->blank_cursor_bo); + + if (mdp4_kms->rpm_enabled) + pm_runtime_disable(dev); + kfree(mdp4_kms); } @@ -515,6 +520,9 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) clk_set_rate(mdp4_kms->clk, config->max_clk); clk_set_rate(mdp4_kms->lut_clk, config->max_clk); + pm_runtime_enable(dev->dev); + mdp4_kms->rpm_enabled = true; + /* make sure things are off before attaching iommu (bootloader could * have left things on, in which case we'll start getting faults if * we don't disable): diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h index c5d045d..25fb839 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h @@ -47,6 +47,8 @@ struct mdp4_kms { struct mdp_irq error_handler; + bool rpm_enabled; + /* empty/blank cursor bo to use when cursor is "disabled" */ struct drm_gem_object *blank_cursor_bo; uint32_t blank_cursor_iova; diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c index a0b9747..5d6d9e1 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c @@ -668,6 +668,9 @@ static void mdp5_destroy(struct platform_device *pdev) mdp5_smp_destroy(mdp5_kms->smp); if (mdp5_kms->cfg) mdp5_cfg_destroy(mdp5_kms->cfg); + + if (mdp5_kms->rpm_enabled) + pm_runtime_disable(&pdev->dev); } static int mdp5_init(struct platform_device *pdev, struct drm_device *dev) @@ -720,6 +723,9 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev) */ clk_set_rate(mdp5_kms->core_clk, 200000000); + pm_runtime_enable(&pdev->dev); + mdp5_kms->rpm_enabled = true; + read_mdp_hw_revision(mdp5_kms, &major, &minor); mdp5_kms->cfg = mdp5_cfg_init(mdp5_kms, major, minor); diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h index d214d50..0373892 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h @@ -59,6 +59,8 @@ struct mdp5_kms { */ spinlock_t resource_lock; + bool rpm_enabled; + struct mdp_irq error_handler; }; #define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_mdss.c index 871c442..d444a69 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_mdss.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_mdss.c @@ -152,6 +152,10 @@ void msm_mdss_destroy(struct drm_device *dev) mdss->irqcontroller.domain = NULL; regulator_disable(mdss->vdd); + + pm_runtime_put_sync(dev->dev); + + pm_runtime_disable(dev->dev); } int msm_mdss_init(struct drm_device *dev) @@ -215,6 +219,14 @@ int msm_mdss_init(struct drm_device *dev) priv->mdss = mdss; + pm_runtime_enable(dev->dev); + + /* + * TODO: This is needed as the MDSS GDSC is only tied to MDSS's power + * domain. Remove this once runtime PM is adapted for all the devices. + */ + pm_runtime_get_sync(dev->dev); + return 0; fail_irq: regulator_disable(mdss->vdd); diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index d650aac..1c18690 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -215,10 +215,8 @@ static int msm_drm_uninit(struct device *dev) flush_workqueue(priv->atomic_wq); destroy_workqueue(priv->atomic_wq); - if (kms) { - pm_runtime_disable(dev); + if (kms) kms->funcs->destroy(kms); - } if (gpu) { mutex_lock(&ddev->struct_mutex); @@ -410,7 +408,6 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) } if (kms) { - pm_runtime_enable(dev); ret = kms->funcs->hw_init(kms); if (ret) { dev_err(dev, "kms hw init failed: %d\n", ret);