From patchwork Fri Jul 8 09:05:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 9220195 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B5A896044F for ; Fri, 8 Jul 2016 09:05:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A4755285F0 for ; Fri, 8 Jul 2016 09:05:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9815C285F9; Fri, 8 Jul 2016 09:05:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6183E285F0 for ; Fri, 8 Jul 2016 09:05:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4CA736E8C8; Fri, 8 Jul 2016 09:05:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf0-f194.google.com (mail-pf0-f194.google.com [209.85.192.194]) by gabe.freedesktop.org (Postfix) with ESMTPS id A73FA6E8C8 for ; Fri, 8 Jul 2016 09:05:37 +0000 (UTC) Received: by mail-pf0-f194.google.com with SMTP id 66so5439472pfy.1 for ; Fri, 08 Jul 2016 02:05:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Z+8TcYTeHup557lmXzsS0f5B5blSWVoy6Gk7Vodi1EQ=; b=VK9wRRKojbj6hXUuRGCA1CEVgJeeUJNwTf+Mkwp58Z1W8rxGNMUoTx+eOwFHI0XxSt xyfIQjCeCl9WNMS0HFvvRcABP7Waq6YCXyfOMxHdGG4Zv42GFVDHvJQ3T4bT9t4njfnK 8Mm3VWOGQKESQM63r4RI4SCZqG1V4BggNTrpEHXAO79Qw8UaC3k+U9fm1Tzt0mqWmnCK FCSK8BVgIjXD1mgv9k2TwGXucgkeEoAQz8S6X1kTbSLx1lGQqyG8Mw9MoFCEIgq7wqwn vYIR6feL6D3b0vbOTDCi345WM5Jde2C3wY8BDCe0n3PDJSl3Qp3kp2O7sjGSkDkLgjEI bMPg== X-Gm-Message-State: ALyK8tJ5pvNMPOSVrdDp1mTcL4XgcQsYNKtnJbRdBdUrl9g0X8uPqPqn2GgWy67Yl3wlIg== X-Received: by 10.98.89.85 with SMTP id n82mr8132779pfb.23.1467968736702; Fri, 08 Jul 2016 02:05:36 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id by5sm3289881pad.36.2016.07.08.02.05.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jul 2016 02:05:35 -0700 (PDT) From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com Subject: [PATCH 6/7] drm/rockchip: dw-mipi: fix phy clk lane stop state timeout Date: Fri, 8 Jul 2016 17:05:00 +0800 Message-Id: <1467968701-15620-7-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1467968701-15620-1-git-send-email-zyw@rock-chips.com> References: <1467968701-15620-1-git-send-email-zyw@rock-chips.com> Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Before phy init, the detection of phy state should be controlled manually. After that, we can switch the detection to hardward, it is automatic. Hence move PHY_TXREQUESTCLKHS setting to the end of phy init. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 72d7f48..8401185 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -477,6 +477,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) dev_err(dsi->dev, "failed to wait for phy clk lane stop state\n"); + dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); + phy_init_end: if (!IS_ERR(dsi->phy_cfg_clk)) clk_disable_unprepare(dsi->phy_cfg_clk); @@ -714,7 +716,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) | PHY_RSTZ | PHY_SHUTDOWNZ); dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | TX_ESC_CLK_DIVIDSION(7)); - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); } static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,