From patchwork Mon Aug 8 13:00:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 9270037 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0BFC26075A for ; Tue, 9 Aug 2016 01:02:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F1D22280DE for ; Tue, 9 Aug 2016 01:02:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E6927281F9; Tue, 9 Aug 2016 01:02:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8F8AB280DE for ; Tue, 9 Aug 2016 01:02:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 36FAA6E537; Tue, 9 Aug 2016 01:02:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id DB4046E2DA; Mon, 8 Aug 2016 13:01:35 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 08 Aug 2016 06:01:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.28,490,1464678000"; d="scan'208"; a="1010443258" Received: from sorvi.fi.intel.com ([10.237.72.167]) by orsmga001.jf.intel.com with ESMTP; 08 Aug 2016 06:00:38 -0700 From: Mika Kahola To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 4/5] drm: Update bits per component for display info Date: Mon, 8 Aug 2016 16:00:29 +0300 Message-Id: <1470661230-15988-5-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1470661230-15988-1-git-send-email-mika.kahola@intel.com> References: <1470661230-15988-1-git-send-email-mika.kahola@intel.com> X-Mailman-Approved-At: Tue, 09 Aug 2016 01:02:00 +0000 Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, jim.bride@linux.intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP DisplayPort branch device may define max supported bits per component. Update display info based on this value if bpc is defined. v2: cleanup to match the drm_dp_helper.c patches introduced earlier in this series v3: Fill bpc for connector's display info in separate drm_dp_helper function (Daniel) Signed-off-by: Mika Kahola --- drivers/gpu/drm/drm_dp_helper.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dp.c | 3 +++ include/drm/drm_dp_helper.h | 4 ++++ 3 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 1f36016..a2c46ed 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -514,6 +514,30 @@ int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], EXPORT_SYMBOL(drm_dp_downstream_max_bpc); /** + * drm_dp_downstream_update_max_bpc() - extract branch device max + * bits per component and update + * connector max bpc + * @dpcd: DisplayPort configuration data + * @port_cap: port capabilities + * @connector: Connector info + * Returns current max bpc on success + */ +int drm_dp_downstream_update_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], + const u8 port_cap[4], + struct drm_connector *connector) +{ + if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT) { + int bpc = drm_dp_downstream_max_bpc(dpcd, port_cap); + + if (bpc > 0) + connector->display_info.bpc = bpc; + } + + return connector->display_info.bpc; +} +EXPORT_SYMBOL(drm_dp_downstream_update_max_bpc); + +/** * drm_dp_downstream_hw_rev() - read DP branch device HW revision * @aux: DisplayPort AUX channel * diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index e990c8b..763e2f5 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3985,6 +3985,9 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) uint8_t *dpcd = intel_dp->dpcd; uint8_t type; + drm_dp_downstream_update_max_bpc(dpcd, intel_dp->downstream_ports, + &intel_dp->attached_connector->base); + if (!intel_dp_get_dpcd(intel_dp)) return connector_status_disconnected; diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 45366aa..5491a9b 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -26,6 +26,7 @@ #include #include #include +#include /* * Unless otherwise noted, all values are from the DP 1.1a spec. Note that @@ -827,6 +828,9 @@ int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]); int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]); +int drm_dp_downstream_update_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], + const u8 port_cap[4], + struct drm_connector *connector); int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]); int drm_dp_downstream_hw_rev(const u8 dpcd[DP_RECEIVER_CAP_SIZE], struct drm_dp_aux *aux, struct drm_dp_link *link);