| Message ID | 1472466831-21348-2-git-send-email-p.zabel@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Aug 29, 2016 at 6:33 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote: > Reset the write FIFO memories after disabling the DMFC > to make sure no stale data is kept around. > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> > --- > drivers/gpu/ipu-v3/ipu-dmfc.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c > index a40f211..e1e5506 100644 > --- a/drivers/gpu/ipu-v3/ipu-dmfc.c > +++ b/drivers/gpu/ipu-v3/ipu-dmfc.c > @@ -131,8 +131,10 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc) > > priv->use_count--; > > - if (!priv->use_count) > + if (!priv->use_count) { > ipu_module_disable(priv->ipu, IPU_CONF_DMFC_EN); > + ipu_memory_reset(priv->ipu, IPU_RST_MEM_DMFC_WR); We've got use counter for DMFC as DMFC can be used by several channels simultaneously. That means only the last user may trigger the DMFC_WR memory reset operation. I assume this is not what we want - we need every channel's dedicated DMFC write memory could be reset separately. However, it looks that the hardware hasn't got the capability to do that. I think writing 1 to DMFC_WR resets all DMFC writing channels' memory. Regards, Liu Ying > + } > > if (priv->use_count < 0) > priv->use_count = 0; > -- > 2.8.1 >
diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c index a40f211..e1e5506 100644 --- a/drivers/gpu/ipu-v3/ipu-dmfc.c +++ b/drivers/gpu/ipu-v3/ipu-dmfc.c @@ -131,8 +131,10 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc) priv->use_count--; - if (!priv->use_count) + if (!priv->use_count) { ipu_module_disable(priv->ipu, IPU_CONF_DMFC_EN); + ipu_memory_reset(priv->ipu, IPU_RST_MEM_DMFC_WR); + } if (priv->use_count < 0) priv->use_count = 0;
Reset the write FIFO memories after disabling the DMFC to make sure no stale data is kept around. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/gpu/ipu-v3/ipu-dmfc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)