From patchwork Wed Nov 30 11:17:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 9454057 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E8F3C60585 for ; Wed, 30 Nov 2016 11:22:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE97F28364 for ; Wed, 30 Nov 2016 11:22:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C37CC28387; Wed, 30 Nov 2016 11:22:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DCA0E28364 for ; Wed, 30 Nov 2016 11:22:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6BBB06E2EE; Wed, 30 Nov 2016 11:22:48 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id DC43F6E104 for ; Wed, 30 Nov 2016 11:18:17 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id uAUBIFWH017426; Wed, 30 Nov 2016 05:18:15 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id uAUBIFDF019485; Wed, 30 Nov 2016 05:18:15 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Wed, 30 Nov 2016 05:18:15 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id uAUBHnV9013328; Wed, 30 Nov 2016 05:18:14 -0600 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCH 19/36] drm/omap: use dispc_ops Date: Wed, 30 Nov 2016 13:17:21 +0200 Message-ID: <1480504658-11775-20-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480504658-11775-1-git-send-email-tomi.valkeinen@ti.com> References: <1480504658-11775-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Cc: Tomi Valkeinen X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Change omapdrm to get dispc_ops and use that to call the dispc functions instead or direct function calls. The change is very straightforward. The only problem was in omap_crtc_init() which calls pipe2vbl(crtc), and at that point of time the crtc->dev link, which is used to get the dispc_ops, has not been set up yet. This patch makes omap_crtc_init() skip the call to pipe2vbl() and instead calls dispc_ops->mgr_get_vsync_irq() directly. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/omap_crtc.c | 47 ++++++++++++++++++++++-------------- drivers/gpu/drm/omapdrm/omap_drv.c | 10 +++++--- drivers/gpu/drm/omapdrm/omap_drv.h | 2 ++ drivers/gpu/drm/omapdrm/omap_irq.c | 33 ++++++++++++++----------- drivers/gpu/drm/omapdrm/omap_plane.c | 14 ++++++----- 5 files changed, 64 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index c0e30a4cb2a9..f3fd786de598 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -59,8 +59,9 @@ struct omap_crtc_state { uint32_t pipe2vbl(struct drm_crtc *crtc) { struct omap_crtc *omap_crtc = to_omap_crtc(crtc); + struct omap_drm_private *priv = crtc->dev->dev_private; - return dispc_mgr_get_vsync_irq(omap_crtc->channel); + return priv->dispc_ops->mgr_get_vsync_irq(omap_crtc->channel); } struct videomode *omap_crtc_timings(struct drm_crtc *crtc) @@ -109,10 +110,12 @@ static struct omap_dss_device *omap_crtc_output[8]; static int omap_crtc_dss_connect(enum omap_channel channel, struct omap_dss_device *dst) { + const struct dispc_ops *dispc_ops = dispc_get_ops(); + if (omap_crtc_output[channel]) return -EINVAL; - if ((dispc_mgr_get_supported_outputs(channel) & dst->id) == 0) + if ((dispc_ops->mgr_get_supported_outputs(channel) & dst->id) == 0) return -EINVAL; omap_crtc_output[channel] = dst; @@ -136,6 +139,7 @@ static void omap_crtc_dss_start_update(enum omap_channel channel) static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) { struct drm_device *dev = crtc->dev; + struct omap_drm_private *priv = dev->dev_private; struct omap_crtc *omap_crtc = to_omap_crtc(crtc); enum omap_channel channel = omap_crtc->channel; struct omap_irq_wait *wait; @@ -143,11 +147,11 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) int ret; if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { - dispc_mgr_enable(channel, enable); + priv->dispc_ops->mgr_enable(channel, enable); return; } - if (dispc_mgr_is_enabled(channel) == enable) + if (priv->dispc_ops->mgr_is_enabled(channel) == enable) return; if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) { @@ -158,8 +162,8 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) omap_crtc->ignore_digit_sync_lost = true; } - framedone_irq = dispc_mgr_get_framedone_irq(channel); - vsync_irq = dispc_mgr_get_vsync_irq(channel); + framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(channel); + vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(channel); if (enable) { wait = omap_irq_wait_init(dev, vsync_irq, 1); @@ -179,7 +183,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) wait = omap_irq_wait_init(dev, vsync_irq, 2); } - dispc_mgr_enable(channel, enable); + priv->dispc_ops->mgr_enable(channel, enable); ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); if (ret) { @@ -198,9 +202,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) static int omap_crtc_dss_enable(enum omap_channel channel) { struct omap_crtc *omap_crtc = omap_crtcs[channel]; + struct omap_drm_private *priv = omap_crtc->base.dev->dev_private; - dispc_mgr_set_timings(omap_crtc->channel, - &omap_crtc->vm); + priv->dispc_ops->mgr_set_timings(omap_crtc->channel, &omap_crtc->vm); omap_crtc_set_enabled(&omap_crtc->base, true); return 0; @@ -225,8 +229,10 @@ static void omap_crtc_dss_set_lcd_config(enum omap_channel channel, const struct dss_lcd_mgr_config *config) { struct omap_crtc *omap_crtc = omap_crtcs[channel]; + struct omap_drm_private *priv = omap_crtc->base.dev->dev_private; + DBG("%s", omap_crtc->name); - dispc_mgr_set_lcd_config(omap_crtc->channel, config); + priv->dispc_ops->mgr_set_lcd_config(omap_crtc->channel, config); } static int omap_crtc_dss_register_framedone( @@ -293,8 +299,9 @@ static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus) struct omap_crtc *omap_crtc = container_of(irq, struct omap_crtc, vblank_irq); struct drm_device *dev = omap_crtc->base.dev; + struct omap_drm_private *priv = dev->dev_private; - if (dispc_mgr_go_busy(omap_crtc->channel)) + if (priv->dispc_ops->mgr_go_busy(omap_crtc->channel)) return; DBG("%s: apply done", omap_crtc->name); @@ -315,6 +322,7 @@ static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus) static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) { + struct omap_drm_private *priv = crtc->dev->dev_private; struct omap_crtc *omap_crtc = to_omap_crtc(crtc); struct omap_overlay_manager_info info; const struct omap_crtc_state *omap_state = @@ -324,7 +332,7 @@ static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) info.default_color = omap_state->default_color; info.trans_enabled = false; - dispc_mgr_setup(omap_crtc->channel, &info); + priv->dispc_ops->mgr_setup(omap_crtc->channel, &info); } /* ----------------------------------------------------------------------------- @@ -455,6 +463,7 @@ static void omap_crtc_atomic_begin(struct drm_crtc *crtc, static void omap_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { + struct omap_drm_private *priv = crtc->dev->dev_private; struct omap_crtc *omap_crtc = to_omap_crtc(crtc); WARN_ON(omap_crtc->vblank_irq.registered); @@ -469,12 +478,12 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, length = crtc->state->gamma_lut->length / sizeof(*lut); } - dispc_mgr_set_gamma(omap_crtc->channel, lut, length); + priv->dispc_ops->mgr_set_gamma(omap_crtc->channel, lut, length); } omap_crtc_write_crtc_properties(crtc); - if (dispc_mgr_is_enabled(omap_crtc->channel)) { + if (priv->dispc_ops->mgr_is_enabled(omap_crtc->channel)) { DBG("%s: GO", omap_crtc->name); @@ -483,7 +492,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, omap_crtc->pending = true; wmb(); - dispc_mgr_go(omap_crtc->channel); + priv->dispc_ops->mgr_go(omap_crtc->channel); omap_irq_register(crtc->dev, &omap_crtc->vblank_irq); } } @@ -616,6 +625,7 @@ static void omap_crtc_install_properties(struct drm_crtc *crtc) struct drm_crtc *omap_crtc_init(struct drm_device *dev, struct drm_plane *plane, enum omap_channel channel, int id) { + struct omap_drm_private *priv = dev->dev_private; struct drm_crtc *crtc = NULL; struct omap_crtc *omap_crtc; int ret; @@ -633,11 +643,12 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, omap_crtc->channel = channel; omap_crtc->name = channel_names[channel]; - omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc); + omap_crtc->vblank_irq.irqmask = + priv->dispc_ops->mgr_get_vsync_irq(channel); omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq; omap_crtc->error_irq.irqmask = - dispc_mgr_get_sync_lost_irq(channel); + priv->dispc_ops->mgr_get_sync_lost_irq(channel); omap_crtc->error_irq.irq = omap_crtc_error_irq; omap_irq_register(dev, &omap_crtc->error_irq); @@ -657,7 +668,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, * extracted with dispc_mgr_gamma_size(). If it returns 0 * gamma table is not supprted. */ - if (dispc_mgr_gamma_size(channel)) { + if (priv->dispc_ops->mgr_gamma_size(channel)) { uint gamma_lut_size = 256; drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index e655b8a16f48..4894e09a75f6 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -93,7 +93,7 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit) struct drm_atomic_state *old_state = commit->state; /* Apply the atomic update. */ - dispc_runtime_get(); + priv->dispc_ops->runtime_get(); drm_atomic_helper_commit_modeset_disables(dev, old_state); drm_atomic_helper_commit_planes(dev, old_state, 0); @@ -103,7 +103,7 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit) drm_atomic_helper_cleanup_planes(dev, old_state); - dispc_runtime_put(); + priv->dispc_ops->runtime_put(); drm_atomic_state_put(old_state); @@ -313,8 +313,8 @@ static int omap_modeset_init(struct drm_device *dev) { struct omap_drm_private *priv = dev->dev_private; struct omap_dss_device *dssdev = NULL; - int num_ovls = dispc_get_num_ovls(); - int num_mgrs = dispc_get_num_mgrs(); + int num_ovls = priv->dispc_ops->get_num_ovls(); + int num_mgrs = priv->dispc_ops->get_num_mgrs(); int num_crtcs; int i, id = 0; int ret; @@ -665,6 +665,8 @@ static int dev_load(struct drm_device *dev, unsigned long flags) priv->omaprev = pdata->omaprev; + priv->dispc_ops = dispc_get_ops(); + dev->dev_private = priv; priv->wq = alloc_ordered_workqueue("omapdrm", 0); diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index 0d16294e8145..11427f21e2ef 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h @@ -72,6 +72,8 @@ int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait, struct omap_drm_private { uint32_t omaprev; + const struct dispc_ops *dispc_ops; + unsigned int num_crtcs; struct drm_crtc *crtcs[8]; diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c index 60e1e8016708..7e5374f201b7 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.c +++ b/drivers/gpu/drm/omapdrm/omap_irq.c @@ -41,8 +41,8 @@ static void omap_irq_update(struct drm_device *dev) DBG("irqmask=%08x", irqmask); - dispc_write_irqenable(irqmask); - dispc_read_irqenable(); /* flush posted write */ + priv->dispc_ops->write_irqenable(irqmask); + priv->dispc_ops->read_irqenable(); /* flush posted write */ } void __omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq) @@ -63,11 +63,13 @@ void __omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq) void omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq) { - dispc_runtime_get(); + struct omap_drm_private *priv = dev->dev_private; + + priv->dispc_ops->runtime_get(); __omap_irq_register(dev, irq); - dispc_runtime_put(); + priv->dispc_ops->runtime_put(); } void __omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq) @@ -87,11 +89,13 @@ void __omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq) void omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq) { - dispc_runtime_get(); + struct omap_drm_private *priv = dev->dev_private; + + priv->dispc_ops->runtime_get(); __omap_irq_unregister(dev, irq); - dispc_runtime_put(); + priv->dispc_ops->runtime_put(); } struct omap_irq_wait { @@ -192,9 +196,9 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) unsigned int id; u32 irqstatus; - irqstatus = dispc_read_irqstatus(); - dispc_clear_irqstatus(irqstatus); - dispc_read_irqstatus(); /* flush posted write */ + irqstatus = priv->dispc_ops->read_irqstatus(); + priv->dispc_ops->clear_irqstatus(irqstatus); + priv->dispc_ops->read_irqstatus(); /* flush posted write */ VERB("irqs: %08x", irqstatus); @@ -233,11 +237,11 @@ int omap_drm_irq_install(struct drm_device *dev) INIT_LIST_HEAD(&priv->irq_list); - dispc_runtime_get(); - dispc_clear_irqstatus(0xffffffff); - dispc_runtime_put(); + priv->dispc_ops->runtime_get(); + priv->dispc_ops->clear_irqstatus(0xffffffff); + priv->dispc_ops->runtime_put(); - ret = dispc_request_irq(omap_irq_handler, dev); + ret = priv->dispc_ops->request_irq(omap_irq_handler, dev); if (ret < 0) return ret; @@ -258,6 +262,7 @@ int omap_drm_irq_install(struct drm_device *dev) void omap_drm_irq_uninstall(struct drm_device *dev) { + struct omap_drm_private *priv = dev->dev_private; unsigned long irqflags; int i; @@ -278,5 +283,5 @@ void omap_drm_irq_uninstall(struct drm_device *dev) spin_unlock_irqrestore(&dev->vbl_lock, irqflags); } - dispc_free_irq(dev); + priv->dispc_ops->free_irq(dev); } diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 0e861a44fd5e..b674c5cc77e8 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -78,6 +78,7 @@ static void omap_plane_cleanup_fb(struct drm_plane *plane, static void omap_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_state) { + struct omap_drm_private *priv = plane->dev->dev_private; struct omap_plane *omap_plane = to_omap_plane(plane); struct drm_plane_state *state = plane->state; struct omap_plane_state *omap_state = to_omap_plane_state(state); @@ -125,25 +126,26 @@ static void omap_plane_atomic_update(struct drm_plane *plane, DBG("%d,%d %pad %pad", info.pos_x, info.pos_y, &info.paddr, &info.p_uv_addr); - dispc_ovl_set_channel_out(omap_plane->id, + priv->dispc_ops->ovl_set_channel_out(omap_plane->id, omap_crtc_channel(state->crtc)); /* and finally, update omapdss: */ - ret = dispc_ovl_setup(omap_plane->id, &info, false, + ret = priv->dispc_ops->ovl_setup(omap_plane->id, &info, false, omap_crtc_timings(state->crtc), false); if (ret) { dev_err(plane->dev->dev, "Failed to setup plane %s\n", omap_plane->name); - dispc_ovl_enable(omap_plane->id, false); + priv->dispc_ops->ovl_enable(omap_plane->id, false); return; } - dispc_ovl_enable(omap_plane->id, true); + priv->dispc_ops->ovl_enable(omap_plane->id, true); } static void omap_plane_atomic_disable(struct drm_plane *plane, struct drm_plane_state *old_state) { + struct omap_drm_private *priv = plane->dev->dev_private; struct omap_plane_state *omap_state = to_omap_plane_state(plane->state); struct omap_plane *omap_plane = to_omap_plane(plane); @@ -151,7 +153,7 @@ static void omap_plane_atomic_disable(struct drm_plane *plane, omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : omap_plane->id; - dispc_ovl_enable(omap_plane->id, false); + priv->dispc_ops->ovl_enable(omap_plane->id, false); } static int omap_plane_atomic_check(struct drm_plane *plane, @@ -371,7 +373,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, omap_plane->nformats = omap_framebuffer_get_formats( omap_plane->formats, ARRAY_SIZE(omap_plane->formats), - dispc_ovl_get_color_modes(id)); + priv->dispc_ops->ovl_get_color_modes(id)); omap_plane->id = id; omap_plane->name = plane_names[id];