From patchwork Mon Jan 16 10:08:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 9518381 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BE2EA6020B for ; Mon, 16 Jan 2017 10:09:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C137283FD for ; Mon, 16 Jan 2017 10:09:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F45D28435; Mon, 16 Jan 2017 10:09:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, URIBL_BLACK autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3E75F28364 for ; Mon, 16 Jan 2017 10:09:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F1B0A6E2BB; Mon, 16 Jan 2017 10:09:27 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pg0-f66.google.com (mail-pg0-f66.google.com [74.125.83.66]) by gabe.freedesktop.org (Postfix) with ESMTPS id 87DE16E2BB for ; Mon, 16 Jan 2017 10:09:27 +0000 (UTC) Received: by mail-pg0-f66.google.com with SMTP id 204so5056412pge.2 for ; Mon, 16 Jan 2017 02:09:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jsF2hWG/6febJZdTN8mD3UipDUwojxVRBOOGk/9kkjk=; b=NgZ+NWx5tpsUAiRaOtkhLGKdFBcEKm8fBnBAhqDNnimgaQmrgGJYsHd0+9+wkNAVpa D7+QsEzRtoh8C4RjBAcnsGnu7ggTGLVGeI5C2bQsdKzsKKtLv1kc/MIkvHzgOy21w4W4 kmSA9GsSzWdtcU7gxDg548MwCkjQjUoUjln5g3kA+mZN3SUg8JEWUL++kL72THJugQc2 dBtl747gI53VHOsfJ607fbOynWS3dTnvMauY/7yBRio+IrnycBh3uxJ0z7lTs7CrvnTR /hMppO7jBn0js7wYCu8Q2E7bx24mKJKcU1vQFriiWcdHqroGT65sgcIuWzfORhB7WB/s h1yQ== X-Gm-Message-State: AIkVDXLraQX5j0uiZK3+6Ukl0L1CEFodZrP0q3NT9yGc1hBJ0o7cjt1JsHUI//qzs+Yfhg== X-Received: by 10.99.146.76 with SMTP id s12mr38741009pgn.8.1484561367200; Mon, 16 Jan 2017 02:09:27 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id k78sm46351848pfb.93.2017.01.16.02.09.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 16 Jan 2017 02:09:26 -0800 (PST) From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org Subject: [PATCH v2 10/11] drm/rockchip/dsi: fix phy clk lane stop state timeout Date: Mon, 16 Jan 2017 18:08:30 +0800 Message-Id: <1484561311-494-11-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1484561311-494-1-git-send-email-zyw@rock-chips.com> References: <1484561311-494-1-git-send-email-zyw@rock-chips.com> Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Before phy init, the detection of phy state should be controlled manually. After that, we can switch the detection to hardward, it is automatic. Hence move PHY_TXREQUESTCLKHS setting to the end of phy init. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index f50909e..9dfa73d 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -475,6 +475,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) dev_err(dsi->dev, "failed to wait for phy clk lane stop state\n"); + dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); + phy_init_end: if (!IS_ERR(dsi->phy_cfg_clk)) clk_disable_unprepare(dsi->phy_cfg_clk); @@ -721,7 +723,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) | PHY_RSTZ | PHY_SHUTDOWNZ); dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | TX_ESC_CLK_DIVIDSION(7)); - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); } static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,