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Fri, 20 Jan 2017 07:39:02 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20170120073902eucas1p27c5b9a57fa5461e227ad090b17af0e8c~bas_w-ff53119931199eucas1p2e; Fri, 20 Jan 2017 07:39:02 +0000 (GMT) X-AuditID: cbfec7f1-f793f6d000007796-9c-5881be961b8a Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 99.47.10233.19EB1885; Fri, 20 Jan 2017 07:38:57 +0000 (GMT) Received: from AMDC2768.DIGITAL.local ([106.120.43.17]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OK200LE1IKT7D70@eusync1.samsung.com>; Fri, 20 Jan 2017 07:39:02 +0000 (GMT) From: Andrzej Hajda To: Archit Taneja , dri-devel@lists.freedesktop.org Subject: [PATCH 23/24] drm/bridge/sii8620: enable MHL3 mode if possible Date: Fri, 20 Jan 2017 08:38:49 +0100 Message-id: <1484897930-1275-24-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1484897930-1275-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRmVeSWpSXmKPExsWy7djP87rT9jVGGHTPN7K4te4cq0VTx1tW i40z1rNaXPn6ns1i0v0JLBZrj9xld2DzuNzXy+Rxv/s4k0ffllWMAcxRXDYpqTmZZalF+nYJ XBkrHm9lK5gnXLHy4DS2BsbNAl2MnBwSAiYSbw/cZ4awxSQu3FvP1sXIxSEksJRRYsP/aVDO Z0aJA+fXMMN03Gx5wgJiCwksY5T4tMgEoug/SFEvG0iCTUBT4u/mm2C2iIC3xJzVfYwgNrPA ekaJa6fiQGxhAXeJjeumgcVZBFQldq9/AlbPK+As8efBM0aIZXISN891gi3mBIqfv/GFCWSZ hMBjNonD51YDNXAAObISmw5AHeci8XnBA3YIW1ji1fEtULaMxOXJ3SwQvd1AR/efYIdwpjBK /PswA6rbWuLw8YusEJfySUzaNp0ZYgGvREebEESJh0T/i5dQ5Y4S048/Z4T4fhqjxIKv25km MMosYGRYxSiSWlqcm55abKRXnJhbXJqXrpecn7uJERinp/8d/7iD8f0Jq0OMAhyMSjy8Ccca IoRYE8uKK3MPMUpwMCuJ8Pasb4wQ4k1JrKxKLcqPLyrNSS0+xCjNwaIkzrtnwZVwIYH0xJLU 7NTUgtQimCwTB6dUA+PEgKksaivKI74tNN8gubVsZV8o9z7N1GeOlo9a+Bp3GHT+TcsXW7DT pUB3id6U8zMcmhub6+NLrs1wNtdjLv6n4tPeK2EisfhiZvbEWRUBk1b8ePXTeVokj+f9ybVS VWGyEuWB1gmOrQrBEgukFm8qu9aeIC5mGxIa9vvaI++t7u1HM/rXKrEUZyQaajEXFScCABRg OyPPAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNLMWRmVeSWpSXmKPExsVy+t/xy7oT9zVGGFzfq2txa905Voumjres FhtnrGe1uPL1PZvFpPsTWCzWHrnL7sDmcbmvl8njfvdxJo++LasYA5ij3GwyUhNTUosUUvOS 81My89JtlUJD3HQtlBTyEnNTbZUidH1DgpQUyhJzSoE8IwM04OAc4B6spG+X4Jax4vFWtoJ5 whUrD05ja2DcLNDFyMkhIWAicbPlCQuELSZx4d56ti5GLg4hgSWMEj8637JDOI1MEnOXPmMC qWIT0JT4u/kmG4gtIuAtMWd1HyNIEbPAekaJqY//soMkhAXcJTaum8YIYrMIqErsXv8ErIFX wFniz4NnjBDr5CRunutkBrE5geLnb3wBWsABtM1J4tos2QmMvAsYGVYxiqSWFuem5xYb6RUn 5haX5qXrJefnbmIEBuy2Yz+37GDsehd8iFGAg1GJh3fHiYYIIdbEsuLK3EOMEhzMSiK8Pesb I4R4UxIrq1KL8uOLSnNSiw8xmgLdNJFZSjQ5HxhNeSXxhiaG5paGRsYWFuZGRkrivFM/XAkX EkhPLEnNTk0tSC2C6WPi4JRqYJS4VsU4e9r8PcXnH27b7ndU7G/0HIHPU7+3vrX4FLzg+6Vl 32cKeXaYPD7WM2/JD4M1BZlajYvPTLiw7k3owtkXrdRZUpScDeJiz5c9PSxZ+4g1wG2C1SZP vQ0v1I/ul9vnMrGlYVmetuZsnz7Rv/6/HS9fSoo3+Ls4WDLDw6tLztcwc/PFWkklluKMREMt 5qLiRADadmV8bgIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170120073902eucas1p27c5b9a57fa5461e227ad090b17af0e8c X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRvsgrw=?= =?UTF-8?B?7ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRtTYW1z?= =?UTF-8?B?dW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170120073902eucas1p27c5b9a57fa5461e227ad090b17af0e8c X-RootMTR: 20170120073902eucas1p27c5b9a57fa5461e227ad090b17af0e8c References: <1484897930-1275-1-git-send-email-a.hajda@samsung.com> Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Since all sub-protocols of MHL3 are already supported MHL3 mode can be enabled. With this patch it is possible to use packed pixel modes and clocks up to 300MHz - 1920x1080@60Hz and 4K modes. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/bridge/sil-sii8620.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index 50bfb3c..57ad0b4 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.c +++ b/drivers/gpu/drm/bridge/sil-sii8620.c @@ -1372,8 +1372,7 @@ static void sii8620_mhl_init(struct sii8620 *ctx) ); sii8620_disable_gen2_write_burst(ctx); - /* currently MHL3 is not supported, so we force version to 0 */ - sii8620_mt_write_stat(ctx, MHL_DST_REG(VERSION), 0); + sii8620_mt_write_stat(ctx, MHL_DST_REG(VERSION), SII8620_MHL_VERSION); sii8620_mt_write_stat(ctx, MHL_DST_REG(CONNECTED_RDY), MHL_DST_CONN_DCAP_RDY | MHL_DST_CONN_XDEVCAPP_SUPP | MHL_DST_CONN_POW_STAT); @@ -1640,14 +1639,16 @@ static void sii8620_irq_g2wb(struct sii8620 *ctx) sii8620_write(ctx, REG_MDT_INT_0, stat); } -static void sii8620_status_changed_dcap(struct sii8620 *ctx) +static void sii8620_status_dcap_ready(struct sii8620 *ctx) { - if (ctx->stat[MHL_DST_CONNECTED_RDY] & MHL_DST_CONN_DCAP_RDY) { - sii8620_set_mode(ctx, CM_MHL1); - sii8620_peer_specific_init(ctx); - sii8620_write(ctx, REG_INTR9_MASK, BIT_INTR9_DEVCAP_DONE - | BIT_INTR9_EDID_DONE | BIT_INTR9_EDID_ERROR); - } + enum sii8620_mode mode; + + mode = ctx->stat[MHL_DST_VERSION] >= 0x30 ? CM_MHL3 : CM_MHL1; + if (mode > ctx->mode) + sii8620_set_mode(ctx, mode); + sii8620_peer_specific_init(ctx); + sii8620_write(ctx, REG_INTR9_MASK, BIT_INTR9_DEVCAP_DONE + | BIT_INTR9_EDID_DONE | BIT_INTR9_EDID_ERROR); } static void sii8620_status_changed_path(struct sii8620 *ctx) @@ -1675,8 +1676,8 @@ static void sii8620_msc_mr_write_stat(struct sii8620 *ctx) sii8620_update_array(ctx->stat, st, MHL_DST_SIZE); sii8620_update_array(ctx->xstat, xst, MHL_XDS_SIZE); - if (st[MHL_DST_CONNECTED_RDY] & MHL_DST_CONN_DCAP_RDY) - sii8620_status_changed_dcap(ctx); + if (ctx->stat[MHL_DST_CONNECTED_RDY] & MHL_DST_CONN_DCAP_RDY) + sii8620_status_dcap_ready(ctx); if (st[MHL_DST_LINK_MODE] & MHL_DST_LM_PATH_ENABLED) sii8620_status_changed_path(ctx);