From patchwork Fri Jan 20 10:10:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 9527869 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1509760459 for ; Fri, 20 Jan 2017 10:11:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0586828626 for ; Fri, 20 Jan 2017 10:11:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE55D2865B; Fri, 20 Jan 2017 10:11:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7674428626 for ; Fri, 20 Jan 2017 10:11:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 59D036EB73; Fri, 20 Jan 2017 10:11:09 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf0-f195.google.com (mail-pf0-f195.google.com [209.85.192.195]) by gabe.freedesktop.org (Postfix) with ESMTPS id 87FB66EB73 for ; Fri, 20 Jan 2017 10:11:07 +0000 (UTC) Received: by mail-pf0-f195.google.com with SMTP id y143so5224278pfb.1 for ; Fri, 20 Jan 2017 02:11:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1qQxC4T0/SBmYpI97ModoLuWXM4Ff/+9OAg9nQDy9mk=; b=GrEQGrCxi2Lal/U7/symYQ6SFRhKSVxSYGunqz1eu8c6gMPjCSWgcQhvq0eRXE1dXx rSvTdxsWMX3jxHcMypQ+rxDIl8k7JokPYpUPWyeBS8nn+iZmzCoRKEC2PVwyQz/2tQgo io7ANSUZsFuytjTUTfehxtkajtI6TmVb2wpqg4WAeLQtpUMSoi1/oxB6ZAxIteNdZJxx qOV2X3v5PqlXxG6XIBVWgNeSjvkNkYYr+HVVgG/XjW5oaKV8uIPhAiv+a9ziQ3HyRkON Csl1DJ61i9qvAXyDCv1xwHCz6Oj4b0i+b5/rFY07AkXOCUFZc1sIEaYacqeaewvEO4K0 /Qpg== X-Gm-Message-State: AIkVDXIR1K4+/rYAud2iBIhniZoLrVqoSXzHAR4bfykEVHEqwIbLQfJocNVwBP5x7IiP8w== X-Received: by 10.98.163.216 with SMTP id q85mr15370178pfl.123.1484907067144; Fri, 20 Jan 2017 02:11:07 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id q22sm15325039pfj.77.2017.01.20.02.11.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Jan 2017 02:11:06 -0800 (PST) From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org Subject: [PATCH v3 1/5] dt-bindings: add rk3399 support for dw-mipi-rockchip Date: Fri, 20 Jan 2017 18:10:47 +0800 Message-Id: <1484907051-7159-2-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1484907051-7159-1-git-send-email-zyw@rock-chips.com> References: <1484907051-7159-1-git-send-email-zyw@rock-chips.com> Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has additional phy config clock. Signed-off-by: Chris Zhong Acked-by: Rob Herring --- Changes in v3: None .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 1753f0c..0f82568 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -5,10 +5,12 @@ Required properties: - #address-cells: Should be <1>. - #size-cells: Should be <0>. - compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi". + "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi". - reg: Represent the physical address range of the controller. - interrupts: Represent the controller's interrupt to the CPU(s). - clocks, clock-names: Phandles to the controller's pll reference - clock(ref) and APB clock(pclk), as described in [1]. + clock(ref) and APB clock(pclk). For RK3399, a phy config clock + (phy_cfg) is additional required. As described in [1]. - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - ports: contain a port node with endpoint definitions as defined in [2]. For vopb,set the reg = <0> and set the reg = <1> for vopl.