From patchwork Tue Mar 14 10:38:40 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Philipp Zabel
X-Patchwork-Id: 9622989
Return-Path:
Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org
[172.30.200.125])
by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id
3244A604A9 for ;
Tue, 14 Mar 2017 10:39:16 +0000 (UTC)
Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1])
by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B8B9280DE
for ;
Tue, 14 Mar 2017 10:39:16 +0000 (UTC)
Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486)
id 0FF61284DC; Tue, 14 Mar 2017 10:39:16 +0000 (UTC)
X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on
pdx-wl-mail.web.codeaurora.org
X-Spam-Level:
X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED
autolearn=ham version=3.3.1
Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177])
(using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256
bits)) (No client certificate requested)
by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BD993280DE
for ;
Tue, 14 Mar 2017 10:39:15 +0000 (UTC)
Received: from gabe.freedesktop.org (localhost [127.0.0.1])
by gabe.freedesktop.org (Postfix) with ESMTP id 850596E703;
Tue, 14 Mar 2017 10:39:03 +0000 (UTC)
X-Original-To: dri-devel@lists.freedesktop.org
Delivered-To: dri-devel@lists.freedesktop.org
Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de
[IPv6:2001:67c:670:201:290:27ff:fe1d:cc33])
by gabe.freedesktop.org (Postfix) with ESMTPS id 5DAFE6E6EE
for ;
Tue, 14 Mar 2017 10:38:56 +0000 (UTC)
Received: from lupine.hi.4.pengutronix.de ([10.1.0.115]
helo=lupine.pengutronix.de.)
by metis.ext.pengutronix.de with esmtp (Exim 4.84_2)
(envelope-from )
id 1cnjqw-0001UT-F2; Tue, 14 Mar 2017 11:38:54 +0100
From: Philipp Zabel
To: dri-devel@lists.freedesktop.org
Subject: [PATCH v3 1/9] gpu: ipu-v3: add DT binding for the Prefetch Resolve
Engine
Date: Tue, 14 Mar 2017 11:38:40 +0100
Message-Id: <1489487928-26083-1-git-send-email-p.zabel@pengutronix.de>
X-Mailer: git-send-email 2.1.4
X-SA-Exim-Connect-IP: 10.1.0.115
X-SA-Exim-Mail-From: p.zabel@pengutronix.de
X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de);
SAEximRunCond expanded to false
X-PTX-Original-Recipient: dri-devel@lists.freedesktop.org
Cc: Mark Rutland , devicetree@vger.kernel.org,
patchwork-lst@pengutronix.de, Rob Herring ,
kernel@pengutronix.de
X-BeenThere: dri-devel@lists.freedesktop.org
X-Mailman-Version: 2.1.18
Precedence: list
List-Id: Direct Rendering Infrastructure - Development
List-Unsubscribe: ,
List-Archive:
List-Post:
List-Help:
List-Subscribe: ,
MIME-Version: 1.0
Errors-To: dri-devel-bounces@lists.freedesktop.org
Sender: "dri-devel"
X-Virus-Scanned: ClamAV using ClamSMTP
From: Lucas Stach
The Prefetch Resolve Engine is a prefetch and tile resolve engine
which prefetches display data from DRAM to an internal SRAM region.
It has a single clock for configuration register access and the
functional units. A single shared interrupt is used for status and
error signaling.
The only external dependency is the SRAM region to use for the
prefetch double buffer.
Signed-off-by: Lucas Stach
Signed-off-by: Philipp Zabel
---
.../bindings/display/imx/fsl-imx-drm.txt | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
index 971c3eedb1c7b..70ae5335d1e30 100644
--- a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
+++ b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
@@ -53,6 +53,32 @@ ipu: ipu@18000000 {
};
};
+Freescale i.MX PRE (Prefetch Resolve Engine)
+============================================
+
+Required properties:
+- compatible: should be "fsl,imx6qp-pre"
+- reg: should be register base and length as documented in the
+ datasheet
+- clocks : phandle to the PRE axi clock input, as described
+ in Documentation/devicetree/bindings/clock/clock-bindings.txt and
+ Documentation/devicetree/bindings/clock/imx6q-clock.txt.
+- clock-names: should be "axi"
+- interrupts: should contain the PRE interrupt
+- fsl,iram: phandle pointing to the mmio-sram device node, that should be
+ used for the PRE SRAM double buffer.
+
+example:
+
+pre@21c8000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021c8000 0x1000>;
+ interrupts = ;
+ clocks = <&clks IMX6QDL_CLK_PRE0>;
+ clock-names = "axi";
+ fsl,iram = <&ocram2>;
+};
+
Parallel display support
========================