From patchwork Tue Mar 28 13:07:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 9649347 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 78EA9602C8 for ; Tue, 28 Mar 2017 13:08:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7044927F9F for ; Tue, 28 Mar 2017 13:08:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 651DE28334; Tue, 28 Mar 2017 13:08:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2658927F9F for ; Tue, 28 Mar 2017 13:08:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9DEE96E5B4; Tue, 28 Mar 2017 13:08:36 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id AA0DB6E5B4 for ; Tue, 28 Mar 2017 13:08:33 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2SD8V4A013376; Tue, 28 Mar 2017 08:08:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1490706511; bh=KtOqUI/ZzFsTErrBwWju+pFWIr6B0pHnCw8NqCK3zic=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qtomIO918ppn22XTsZ7pH4iUDQI3w9L0qNvta8CYRF2uuY67FFGvhsuAOrclcqF5a PCGueZsfLWusibld0LvIx6i0Wr0K6ME9wyxcBNd51T+3RNrjQEhLQe5cCTP1pelRik 8U7cmjdOw2O83/tmqK/+Xfu7rnM8b1RTuryqPmnk= Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2SD8Ugn005579; Tue, 28 Mar 2017 08:08:30 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Tue, 28 Mar 2017 08:08:30 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2SD8LiG008523; Tue, 28 Mar 2017 08:08:29 -0500 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCHv3 05/30] drm/omap: improve DPI clock selection on DRA7xx Date: Tue, 28 Mar 2017 16:07:51 +0300 Message-ID: <1490706496-4959-6-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490706496-4959-1-git-send-email-tomi.valkeinen@ti.com> References: <1490706496-4959-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Cc: Tomi Valkeinen , Jyri Sarha X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The clock source selection for the LCD outputs is too hardcoded at the moment. For example, LCD3 is set to use PLL2_1, and PLL2 doesn't exist on DRA72x SoCs. There are quite many ways to configure the clocks, even using HDMI PLL for LCD outputs, but enabling full configuration of the clocks is rather tricky. This patch improves the situation a bit by checking if the PLL about to be used exists, and if not, tries another one. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/dss/dpi.c | 47 ++++++++++++++++++++++++++++++--------- 1 file changed, 37 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c b/drivers/gpu/drm/omapdrm/dss/dpi.c index e0b0c5c24c55..0f32d5d078c6 100644 --- a/drivers/gpu/drm/omapdrm/dss/dpi.c +++ b/drivers/gpu/drm/omapdrm/dss/dpi.c @@ -67,6 +67,42 @@ static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev) return dev_get_drvdata(&pdev->dev); } +static enum dss_clk_source dpi_get_clk_src_dra7xx(enum omap_channel channel) +{ + /* + * Possible clock sources: + * LCD1: FCK/PLL1_1/HDMI_PLL + * LCD2: FCK/PLL1_3/HDMI_PLL (DRA74x: PLL2_3) + * LCD3: FCK/PLL1_3/HDMI_PLL (DRA74x: PLL2_1) + */ + + switch (channel) { + case OMAP_DSS_CHANNEL_LCD: + { + if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_1)) + return DSS_CLK_SRC_PLL1_1; + } + case OMAP_DSS_CHANNEL_LCD2: + { + if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_3)) + return DSS_CLK_SRC_PLL1_3; + if (dss_pll_find_by_src(DSS_CLK_SRC_PLL2_3)) + return DSS_CLK_SRC_PLL2_3; + } + case OMAP_DSS_CHANNEL_LCD3: + { + if (dss_pll_find_by_src(DSS_CLK_SRC_PLL2_1)) + return DSS_CLK_SRC_PLL2_1; + if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_3)) + return DSS_CLK_SRC_PLL1_3; + } + default: + break; + } + + return DSS_CLK_SRC_FCK; +} + static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel) { /* @@ -107,16 +143,7 @@ static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel) } case OMAPDSS_VER_DRA7xx: - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return DSS_CLK_SRC_PLL1_1; - case OMAP_DSS_CHANNEL_LCD2: - return DSS_CLK_SRC_PLL1_3; - case OMAP_DSS_CHANNEL_LCD3: - return DSS_CLK_SRC_PLL2_1; - default: - return DSS_CLK_SRC_FCK; - } + return dpi_get_clk_src_dra7xx(channel); default: return DSS_CLK_SRC_FCK;