From patchwork Fri Apr 7 16:39:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 9669917 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2BCB060364 for ; Fri, 7 Apr 2017 16:40:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C484285B6 for ; Fri, 7 Apr 2017 16:40:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 111F428621; Fri, 7 Apr 2017 16:40:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5917F285B6 for ; Fri, 7 Apr 2017 16:40:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3BB906EC2E; Fri, 7 Apr 2017 16:39:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 026076EC29; Fri, 7 Apr 2017 16:39:43 +0000 (UTC) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP; 07 Apr 2017 09:39:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,166,1488873600"; d="scan'208";a="86048133" Received: from shashanks-pc.fi.intel.com ([10.237.68.39]) by fmsmga005.fm.intel.com with ESMTP; 07 Apr 2017 09:39:42 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 10/11] drm/i915: prepare ycbcr420 modeset Date: Fri, 7 Apr 2017 19:39:27 +0300 Message-Id: <1491583168-20042-11-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491583168-20042-1-git-send-email-shashank.sharma@intel.com> References: <1491583168-20042-1-git-send-email-shashank.sharma@intel.com> Cc: Ander Conselvan De Oliveira X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP To get a ycbcr420 output from intel platforms, there are two major steps: - RGB->YCBCR conversion using a pipe CSC. - Program PIPE_MISC register to generate a ycbcr420 output. - Scaling down YCBCR444 samples to YCBCR420 samples using a pipe scaler. This patch: - Does scaler allocation for HDMI ycbcr420 outputs. - Programs PIPE_MISC register for ycbcr420 output. - Adds a new scaler user "HDMI output" to plug-into existing scaler framework. This output is identified with bit 30 of the scaler users bitmap. Cc: Ville Syrjala Cc: Ander Conselvan De Oliveira Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_atomic.c | 6 ++++++ drivers/gpu/drm/i915/intel_display.c | 34 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 10 +++++++++- drivers/gpu/drm/i915/intel_hdmi.c | 11 +++++++++++ drivers/gpu/drm/i915/intel_panel.c | 3 ++- 6 files changed, 65 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 11b12f4..ecf28df 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5024,6 +5024,9 @@ enum { #define _PIPE_MISC_A 0x70030 #define _PIPE_MISC_B 0x71030 +#define PIPEMISC_YCBCR420_ENABLE (1<<27) +#define PIPEMISC_YCBCR420_MODE_BLEND (1<<26) +#define PIPEMISC_OUTPUT_YCBCR (1<<11) #define PIPEMISC_DITHER_BPC_MASK (7<<5) #define PIPEMISC_DITHER_8_BPC (0<<5) #define PIPEMISC_DITHER_10_BPC (1<<5) diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c index 50fb1f7..592b0d2 100644 --- a/drivers/gpu/drm/i915/intel_atomic.c +++ b/drivers/gpu/drm/i915/intel_atomic.c @@ -187,6 +187,12 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, /* panel fitter case: assign as a crtc scaler */ scaler_id = &scaler_state->scaler_id; + } else if (i == SKL_HDMI_OUTPUT_INDEX) { + name = "HDMI-OUTPUT"; + idx = intel_crtc->base.base.id; + + /* hdmi output case: needs a pipe scaler */ + scaler_id = &scaler_state->scaler_id; } else { name = "PLANE"; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b03e5f3..5c4b342 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4611,6 +4611,11 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, (src_h != dst_w || src_w != dst_h): (src_w != dst_w || src_h != dst_h); + if (crtc_state->hdmi_output == DRM_HDMI_OUTPUT_YCBCR420 + && scaler_user == SKL_HDMI_OUTPUT_INDEX) + /* YCBCR 444 -> 420 conversion needs a scaler */ + need_scaling = true; + /* * if plane is being disabled or scaler is no more required or force detach * - free scaler binded to this plane/crtc @@ -4658,6 +4663,26 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, } /** + * skl_update_scaler_hdmi_output - Stages update to scaler state for HDMI. + * HDMI YCBCR 420 output needs a scaler, for downsampling. + * + * @state: crtc's scaler state + * + * Return + * 0 - scaler_usage updated successfully + * error - requested scaling cannot be supported or other error condition + */ +int skl_update_scaler_crtc_hdmi_output(struct intel_crtc_state *state) +{ + const struct drm_display_mode *mode = &state->base.adjusted_mode; + + return skl_update_scaler(state, !state->base.active, + SKL_HDMI_OUTPUT_INDEX, &state->scaler_state.scaler_id, + DRM_ROTATE_0, state->pipe_src_w, state->pipe_src_h, + mode->crtc_hdisplay, mode->crtc_vdisplay); +} + +/** * skl_update_scaler_crtc - Stages update to scaler state for a given crtc. * * @state: crtc's scaler state @@ -8053,6 +8078,7 @@ static void haswell_set_pipemisc(struct drm_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + enum drm_hdmi_output_type hdmi_out = intel_crtc->config->hdmi_output; if (IS_BROADWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 9) { u32 val = 0; @@ -8078,6 +8104,14 @@ static void haswell_set_pipemisc(struct drm_crtc *crtc) if (intel_crtc->config->dither) val |= PIPEMISC_DITHER_ENABLE | PIPEMISC_DITHER_TYPE_SP; + if (hdmi_out) { + val |= PIPEMISC_OUTPUT_YCBCR; + if (hdmi_out == DRM_HDMI_OUTPUT_YCBCR420) { + val |= PIPEMISC_YCBCR420_ENABLE | + PIPEMISC_YCBCR420_MODE_BLEND; + } + } + I915_WRITE(PIPEMISC(intel_crtc->pipe), val); } } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 98902d4..2a336d7 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -454,7 +454,8 @@ struct intel_crtc_scaler_state { * * If a bit is set, a user is using a scaler. * Here user can be a plane or crtc as defined below: - * bits 0-30 - plane (bit position is index from drm_plane_index) + * bits 0-29 - plane (bit position is index from drm_plane_index) + * bit 30 - hdmi output * bit 31 - crtc * * Instead of creating a new index to cover planes and crtc, using @@ -467,6 +468,12 @@ struct intel_crtc_scaler_state { * avilability. */ #define SKL_CRTC_INDEX 31 + + /* + * HDMI YCBCR 420 output consume a scaler. So adding a user + * for HDMI output 420 requirement. + */ +#define SKL_HDMI_OUTPUT_INDEX 30 unsigned scaler_users; /* scaler used by crtc for panel fitting purpose */ @@ -1450,6 +1457,7 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, struct intel_crtc_state *pipe_config); int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); +int skl_update_scaler_crtc_hdmi_output(struct intel_crtc_state *state); int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 40d3414..f0826a5 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1412,6 +1412,7 @@ intel_hdmi_compute_ycbcr_config(struct drm_connector_state *conn_state, { struct drm_connector *connector = conn_state->connector; struct drm_display_info *info = &connector->display_info; + struct intel_crtc *intel_crtc = to_intel_crtc(conn_state->crtc); struct drm_display_mode *mode = &config->base.adjusted_mode; enum drm_hdmi_output_type type = conn_state->hdmi_output; @@ -1455,6 +1456,16 @@ intel_hdmi_compute_ycbcr_config(struct drm_connector_state *conn_state, config->port_clock /= 2; *clock_12bpc /= 2; *clock_8bpc /= 2; + + /* ycbcr 420 output conversion needs a scaler */ + if (skl_update_scaler_crtc_hdmi_output(config)) { + DRM_ERROR("Scaler allocation for output failed\n"); + return DRM_HDMI_OUTPUT_INVALID; + } + + /* Bind this scaler to pipe */ + intel_pch_panel_fitting(intel_crtc, config, + DRM_MODE_SCALE_FULLSCREEN); break; case DRM_HDMI_OUTPUT_YCBCR422: diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index cb50c52..b20aa1e 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -110,7 +110,8 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc, /* Native modes don't need fitting */ if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && - adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) + adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && + pipe_config->hdmi_output != DRM_HDMI_OUTPUT_YCBCR420) goto done; switch (fitting_mode) {