From patchwork Fri Apr 7 16:39:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 9669891 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 11AB960364 for ; Fri, 7 Apr 2017 16:39:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 03D9B285B6 for ; Fri, 7 Apr 2017 16:39:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EC9C628621; Fri, 7 Apr 2017 16:39:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 830C5285B6 for ; Fri, 7 Apr 2017 16:39:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B60C6EC42; Fri, 7 Apr 2017 16:39:32 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5EEE76EC41; Fri, 7 Apr 2017 16:39:31 +0000 (UTC) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP; 07 Apr 2017 09:39:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,166,1488873600"; d="scan'208";a="86048063" Received: from shashanks-pc.fi.intel.com ([10.237.68.39]) by fmsmga005.fm.intel.com with ESMTP; 07 Apr 2017 09:39:29 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 03/11] drm: parse ycbcr 420 vdb block Date: Fri, 7 Apr 2017 19:39:20 +0300 Message-Id: <1491583168-20042-4-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491583168-20042-1-git-send-email-shashank.sharma@intel.com> References: <1491583168-20042-1-git-send-email-shashank.sharma@intel.com> Cc: Jose Abreu X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Jose Abreu HDMI 2.0 spec adds support for ycbcr420 subsampled output. CEA-861-F adds two new blocks in EDID, to provide information about sink's support for ycbcr420 output. These new blocks are: - ycbcr420 video data (vdb) block: video modes which can be supported only in ycbcr420 output mode. - ycbcr420 video capability data (vcb) block: video modes which can be support in ycbcr420 output mode also (along with RGB, YCBCR 444/422 etc) This patch adds parsing and handling of ycbcr420-vdb in the DRM layer. This patch is a modified version of Jose's RFC patch: https://patchwork.kernel.org/patch/9492327/ so the authorship is maintained. Cc: Ville Syrjala Signed-off-by: Jose Abreu Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 54 +++++++++++++++++++++++++++++++++++++++++++-- drivers/gpu/drm/drm_modes.c | 10 +++++++-- include/drm/drm_connector.h | 1 + include/uapi/drm/drm_mode.h | 6 +++++ 4 files changed, 67 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 8d98687..64d8e2e 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2777,6 +2777,7 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, #define VENDOR_BLOCK 0x03 #define SPEAKER_BLOCK 0x04 #define VIDEO_CAPABILITY_BLOCK 0x07 +#define VIDEO_DATA_BLOCK_420 0x0E #define EDID_BASIC_AUDIO (1 << 6) #define EDID_CEA_YCRCB444 (1 << 5) #define EDID_CEA_YCRCB422 (1 << 4) @@ -3278,6 +3279,32 @@ static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, return modes; } +/* Modes which can be supported in ycbcr 420 format only */ +static int do_420_vdb_modes(struct drm_connector *connector, const u8 *svds, + u8 svds_len) +{ + int modes = 0, i; + struct drm_device *dev = connector->dev; + struct drm_display_mode *newmode; + struct drm_display_info *info = &connector->display_info; + + for (i = 0; i < svds_len; i++) { + u8 vic = svds[i] & 0x7f; + + newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); + if (!newmode) + break; + + newmode->flags |= DRM_MODE_FLAG_420_ONLY; + drm_mode_probed_add(connector, newmode); + modes++; + } + + if (modes > 0) + info->color_formats |= DRM_COLOR_FORMAT_YCRCB420; + return modes; +} + /* * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block * @connector: connector corresponding to the HDMI sink @@ -3434,6 +3461,12 @@ cea_db_tag(const u8 *db) } static int +cea_db_extended_tag(const u8 *db) +{ + return db[1]; +} + +static int cea_revision(const u8 *cea) { return cea[1]; @@ -3482,6 +3515,17 @@ static bool cea_db_is_hdmi_forum_vsdb(const u8 *db) return oui == HDMI_FORUM_IEEE_OUI; } +static bool cea_db_is_hdmi_vdb420(const u8 *db) +{ + if (cea_db_tag(db) != VIDEO_CAPABILITY_BLOCK) + return false; + + if (cea_db_extended_tag(db) != VIDEO_DATA_BLOCK_420) + return false; + + return true; +} + #define for_each_cea_db(cea, i, start, end) \ for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) @@ -3507,10 +3551,16 @@ add_cea_modes(struct drm_connector *connector, struct edid *edid) video = db + 1; video_len = dbl; modes += do_cea_modes(connector, video, dbl); - } - else if (cea_db_is_hdmi_vsdb(db)) { + } else if (cea_db_is_hdmi_vsdb(db)) { hdmi = db; hdmi_len = dbl; + } else if (cea_db_is_hdmi_vdb420(db)) { + const u8 *vdb420 = &db[2]; + u8 vdb420_len = dbl - 1; + + /* Add 4:2:0(only) modes present in EDID */ + modes += do_420_vdb_modes(connector, vdb420, + vdb420_len); } } } diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index f2493b9..10432f3 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -987,6 +987,10 @@ bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct (mode2->flags & DRM_MODE_FLAG_3D_MASK)) return false; + if ((mode1->flags & DRM_MODE_FLAG_420_MASK) != + (mode2->flags & DRM_MODE_FLAG_420_MASK)) + return false; + return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); } EXPORT_SYMBOL(drm_mode_equal_no_clocks); @@ -1005,6 +1009,9 @@ EXPORT_SYMBOL(drm_mode_equal_no_clocks); bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) { + unsigned int flags_mask = + ~(DRM_MODE_FLAG_3D_MASK | DRM_MODE_FLAG_420_MASK); + if (mode1->hdisplay == mode2->hdisplay && mode1->hsync_start == mode2->hsync_start && mode1->hsync_end == mode2->hsync_end && @@ -1015,8 +1022,7 @@ bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, mode1->vsync_end == mode2->vsync_end && mode1->vtotal == mode2->vtotal && mode1->vscan == mode2->vscan && - (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == - (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) + (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) return true; return false; diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 4eeda12..cef76b2 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -199,6 +199,7 @@ struct drm_display_info { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) +#define DRM_COLOR_FORMAT_YCRCB420 (1<<2) /** * @color_formats: HDMI Color formats, selects between RGB and YCrCb diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 8c67fc0..1e74d8e 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -84,6 +84,12 @@ extern "C" { #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) +/* + * HDMI 2.0 + */ +#define DRM_MODE_FLAG_420_MASK (0x03<<23) +#define DRM_MODE_FLAG_420 (1<<23) +#define DRM_MODE_FLAG_420_ONLY (1<<24) /* Picture aspect ratio options */ #define DRM_MODE_PICTURE_ASPECT_NONE 0