From patchwork Thu May 4 10:23:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 9711357 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2138760235 for ; Thu, 4 May 2017 10:24:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0072128663 for ; Thu, 4 May 2017 10:24:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E96CF28683; Thu, 4 May 2017 10:24:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 48D3D28663 for ; Thu, 4 May 2017 10:24:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D4A906E4EA; Thu, 4 May 2017 10:23:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id 589416E4EA for ; Thu, 4 May 2017 10:23:56 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v44ANsIZ018043; Thu, 4 May 2017 05:23:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1493893434; bh=c7zt5ihjxZ3B2SKsSRtlZq9Oyz0Qs9ifY3gBPnOHupk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QJeUzMlivv+vsDtac2DghQ5PaK5yBq4dOmoIPOpVSLMxPE3MzFsGePYr4Pkpk5XpG WUFkjm+ggxPTAfOfgbjuGWDR4ukb1pJiFeS2yoqOZj3xf0YlphVD0lnQmLb0vQOVgQ ThtOULh27JSEsDpEzhPR6H4Zh22YXHX1Jgi6wM2c= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v44ANsXf014758; Thu, 4 May 2017 05:23:54 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Thu, 4 May 2017 05:23:53 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v44ANZsL019135; Thu, 4 May 2017 05:23:52 -0500 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCH 11/16] drm/omap: change supported_modes to an array Date: Thu, 4 May 2017 13:23:27 +0300 Message-ID: <1493893412-12178-12-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1493893412-12178-1-git-send-email-tomi.valkeinen@ti.com> References: <1493893412-12178-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Cc: Tomi Valkeinen , Jyri Sarha X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP enum omap_color_mode is a bitmask, so at the moment we present the supported color modes as mask. To be able to move to fourccs, we need to use an array to present the supported color modes. As a first step towards fourccs, this patch changes the code to use an array to store the enums. Signed-off-by: Tomi Valkeinen Acked-by: Laurent Pinchart --- drivers/gpu/drm/omapdrm/dss/dispc.c | 2 +- drivers/gpu/drm/omapdrm/dss/dss_features.c | 153 +++++++++++++++++------------ drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 +- drivers/gpu/drm/omapdrm/omap_drv.h | 2 +- drivers/gpu/drm/omapdrm/omap_fb.c | 14 ++- 6 files changed, 103 insertions(+), 72 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 9dfef8fdff67..dcd83efda3af 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1140,7 +1140,7 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane_id plane) return unit * 8; } -static enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane_id plane) +static const enum omap_color_mode *dispc_ovl_get_color_modes(enum omap_plane_id plane) { return dss_feat_get_supported_color_modes(plane); } diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index bdac1d645ef0..f9b0324cc263 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -47,7 +47,7 @@ struct omap_dss_features { const int num_ovls; const enum omap_display_type *supported_displays; const enum omap_dss_output_id *supported_outputs; - const enum omap_color_mode *supported_color_modes; + const enum omap_color_mode **supported_color_modes; const enum omap_overlay_caps *overlay_caps; const struct dss_param_range *dss_params; @@ -229,90 +229,104 @@ static const enum omap_dss_output_id omap5_dss_supported_outputs[] = { OMAP_DSS_OUTPUT_DSI2, }; -static const enum omap_color_mode omap2_dss_supported_color_modes[] = { +#define COLOR_ARRAY(arr...) (const enum omap_color_mode[]) { arr, 0 } + +static const enum omap_color_mode *omap2_dss_supported_color_modes[] = { + /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | - OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16, + OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P), /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, + OMAP_DSS_COLOR_UYVY), /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, + OMAP_DSS_COLOR_UYVY), }; -static const enum omap_color_mode omap3_dss_supported_color_modes[] = { +static const enum omap_color_mode *omap3_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32), /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P, + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY), /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, + OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_ARGB32, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32), }; -static const enum omap_color_mode omap4_dss_supported_color_modes[] = { +static const enum omap_color_mode *omap4_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 | - OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32, + OMAP_DSS_COLOR_ARGB16_1555, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_XRGB16_1555), /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32), /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32), /* OMAP_DSS_VIDEO3 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32), /* OMAP_DSS_WB */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32), }; static const enum omap_overlay_caps omap2_dss_overlay_caps[] = { @@ -783,7 +797,7 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel return omap_current_dss_features->supported_outputs[channel]; } -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane) +const enum omap_color_mode *dss_feat_get_supported_color_modes(enum omap_plane_id plane) { return omap_current_dss_features->supported_color_modes[plane]; } @@ -796,8 +810,17 @@ enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane) bool dss_feat_color_mode_supported(enum omap_plane_id plane, enum omap_color_mode color_mode) { - return omap_current_dss_features->supported_color_modes[plane] & - color_mode; + const enum omap_color_mode *modes; + unsigned int i; + + modes = omap_current_dss_features->supported_color_modes[plane]; + + for (i = 0; modes[i]; ++i) { + if (modes[i] == color_mode) + return true; + } + + return false; } u32 dss_feat_get_buffer_size_unit(void) diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index 6f262887502d..190cf62537b0 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -104,6 +104,6 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel int dss_feat_get_num_mgrs(void); int dss_feat_get_num_ovls(void); -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane); +const enum omap_color_mode *dss_feat_get_supported_color_modes(enum omap_plane_id plane); #endif diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index cf822dbcfe29..334680673074 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -876,7 +876,7 @@ struct dispc_ops { const struct videomode *vm, bool mem_to_mem, enum omap_channel channel); - enum omap_color_mode (*ovl_get_color_modes)(enum omap_plane_id plane); + const enum omap_color_mode *(*ovl_get_color_modes)(enum omap_plane_id plane); }; void dispc_set_ops(const struct dispc_ops *o); diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index 7a4c57eb6536..962180790f42 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h @@ -159,7 +159,7 @@ struct drm_encoder *omap_connector_attached_encoder( bool omap_connector_get_hdmi_mode(struct drm_connector *connector); uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, enum omap_color_mode supported_modes); + uint32_t max_formats, const enum omap_color_mode *supported_modes); struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 0cdbf6ccb6ad..a53022cbb14f 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -57,14 +57,22 @@ static const struct { /* convert from overlay's pixel formats bitmask to an array of fourcc's */ uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, enum omap_color_mode supported_modes) + uint32_t max_formats, const enum omap_color_mode *supported_modes) { uint32_t nformats = 0; int i = 0; - for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) - if (formats[i].dss_format & supported_modes) + for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) { + unsigned int t; + + for (t = 0; supported_modes[t]; ++t) { + if (supported_modes[t] != formats[i].dss_format) + continue; + pixel_formats[nformats++] = formats[i].pixel_format; + break; + } + } return nformats; }