From patchwork Mon May 8 08:51:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 9715901 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 470DC602A0 for ; Mon, 8 May 2017 08:51:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 390B424151 for ; Mon, 8 May 2017 08:51:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2C1AC27D4D; Mon, 8 May 2017 08:51:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C31E324151 for ; Mon, 8 May 2017 08:51:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A20B6E196; Mon, 8 May 2017 08:51:34 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0F6206E18C for ; Mon, 8 May 2017 08:51:32 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v488pTVt016893; Mon, 8 May 2017 03:51:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1494233489; bh=TVZObSJFRu6CGCXh0VzeAvEXOM/11ZY2onQxBDohKSw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jM8sHSAwSv/GUfIskr7FjSQOwwP+AyhVh1PJNDHUzx5XX3IjZq9mokEdHK/RSjmtY omfUEmjPlQ+lzm30K++euINTVV1o4ZFlTxcpGl0nfMFz/OswGiHV19b5cpt96IFqnC pRw7FZZ+XPUvMpKEHCX8GuRjAB1Ah3koZq/GXPoY= Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v488pTv6008783; Mon, 8 May 2017 03:51:29 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 8 May 2017 03:51:28 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v488pOm6004402; Mon, 8 May 2017 03:51:27 -0500 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCH 2/2] drm/omap: add OMAP_BO flags to affect buffer allocation Date: Mon, 8 May 2017 11:51:22 +0300 Message-ID: <1494233482-23403-3-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494233482-23403-1-git-send-email-tomi.valkeinen@ti.com> References: <1494233482-23403-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Cc: Tomi Valkeinen , Jyri Sarha X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP On SoCs with TILER, we have to ways to allocate buffers: normal dma_alloc or via TILER (which basically functions as an IOMMU). TILER can map 128MB at a time, and we only map the TILER buffers when they are used (i.e. not at alloc time). If TILER is present, omapdrm always uses TILER. There are use cases that require lots of big buffers that are being used at the same time by different IPs. At the moment the userspace has a hard maximum of 128MB. This patch adds three new flags that can be used by the userspace to solve the situation: OMAP_BO_MEM_CONTIG: The driver will use dma_alloc to get the memory. This can be used to avoid TILER if the userspace knows it needs more than 128M of memory at the same time. OMAP_BO_MEM_TILER: The driver will use TILER to get the memory. There's nto much use for this flag at the moment, but it's here for completeness. OMAP_BO_MEM_PIN: The driver will pin the memory at alloc time, and keep it pinned. This can be used to 1) get an error at alloc time if TILER space is full, and 2) get rid of the constant pin/unpin operations which may have some effect on performance. If none of the flags are given, the behavior is the same as currently. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/omap_gem.c | 23 ++++++++++++++++++++++- include/uapi/drm/omap_drm.h | 3 +++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c index 5d73dccc1383..90ae8615f6c6 100644 --- a/drivers/gpu/drm/omapdrm/omap_gem.c +++ b/drivers/gpu/drm/omapdrm/omap_gem.c @@ -1292,6 +1292,9 @@ void omap_gem_free_object(struct drm_gem_object *obj) list_del(&omap_obj->mm_list); spin_unlock(&priv->list_lock); + if (omap_obj->flags & OMAP_BO_MEM_PIN) + omap_gem_put_paddr_locked(obj); + /* this means the object is still pinned.. which really should * not happen. I think.. */ @@ -1338,6 +1341,11 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev, return NULL; } + if (flags & OMAP_BO_MEM_CONTIG) { + dev_err(dev->dev, "Tiled buffers require TILER memory\n"); + return NULL; + } + /* * Tiled buffers are always shmem paged backed. When they are * scanned out, they are remapped into DMM/TILER. @@ -1351,7 +1359,8 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev, */ flags &= ~(OMAP_BO_CACHED|OMAP_BO_WC|OMAP_BO_UNCACHED); flags |= tiler_get_cpu_cache_flags(); - } else if ((flags & OMAP_BO_SCANOUT) && !priv->has_dmm) { + } else if ((flags & OMAP_BO_MEM_CONTIG) || + ((flags & OMAP_BO_SCANOUT) && !priv->has_dmm)) { /* * OMAP_BO_SCANOUT hints that the buffer doesn't need to be * tiled. However, to lower the pressure on memory allocation, @@ -1411,12 +1420,24 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev, goto err_release; } + if (flags & OMAP_BO_MEM_PIN) { + dma_addr_t dummy; + + ret = omap_gem_get_paddr(obj, &dummy, true); + if (ret) + goto err_free_dma; + } + spin_lock(&priv->list_lock); list_add(&omap_obj->mm_list, &priv->obj_list); spin_unlock(&priv->list_lock); return obj; +err_free_dma: + if (flags & OMAP_BO_MEM_DMA_API) + dma_free_writecombine(dev->dev, size, + omap_obj->vaddr, omap_obj->paddr); err_release: drm_gem_object_release(obj); err_free: diff --git a/include/uapi/drm/omap_drm.h b/include/uapi/drm/omap_drm.h index 7fb97863c945..a976e8682c5f 100644 --- a/include/uapi/drm/omap_drm.h +++ b/include/uapi/drm/omap_drm.h @@ -40,6 +40,9 @@ struct drm_omap_param { #define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */ #define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */ #define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */ +#define OMAP_BO_MEM_CONTIG 0x00000008 /* only use contiguous dma mem */ +#define OMAP_BO_MEM_TILER 0x00000010 /* only use TILER mem */ +#define OMAP_BO_MEM_PIN 0x00000020 /* pin the buffer when allocating */ /* cache modes */ #define OMAP_BO_CACHED 0x00000000 /* default */