From patchwork Fri May 19 15:20:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe CORNU X-Patchwork-Id: 9738429 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CE610600C8 for ; Sat, 20 May 2017 01:14:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9FF2C285B6 for ; Sat, 20 May 2017 01:14:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 94A89285B8; Sat, 20 May 2017 01:14:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 48ECC285B6 for ; Sat, 20 May 2017 01:14:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 57CB36E1B3; Sat, 20 May 2017 01:13:43 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by gabe.freedesktop.org (Postfix) with ESMTPS id 016C76E6AF for ; Fri, 19 May 2017 15:21:02 +0000 (UTC) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v4JF8aUe028641; Fri, 19 May 2017 17:20:37 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 2ahdwy63dr-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 19 May 2017 17:20:37 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4A47034; Fri, 19 May 2017 15:20:36 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 278CF2442; Fri, 19 May 2017 15:20:36 +0000 (GMT) Received: from localhost (10.201.23.32) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.339.0; Fri, 19 May 2017 17:20:35 +0200 From: Philippe CORNU To: Alexandre Torgue , Thierry Reding , David Airlie , Maxime Coquelin , Russell King , Mark Rutland , Rob Herring , Arnd Bergmann , Benjamin Gaignard , Yannick Fertre , Neil Armstrong , Archit Taneja , Eric Anholt , Chris Zhong Subject: [PATCH v2 2/5] dt-bindings: display: Add Synopsys DW MIPI DSI DRM bridge driver Date: Fri, 19 May 2017 17:20:15 +0200 Message-ID: <1495207218-11372-3-git-send-email-philippe.cornu@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495207218-11372-1-git-send-email-philippe.cornu@st.com> References: <1495207218-11372-1-git-send-email-philippe.cornu@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.32] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-05-19_09:, , signatures=0 X-Mailman-Approved-At: Sat, 20 May 2017 01:13:06 +0000 Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Philippe Cornu , Fabien Dessenne , dri-devel@lists.freedesktop.org, Mickael Reulier , Vincent Abriou , Gabriel Fernandez , Ludovic Barre X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds documentation of device tree bindings for the Synopsys DesignWare MIPI DSI host DRM bridge driver. Signed-off-by: Philippe CORNU --- .../bindings/display/bridge/dw_mipi_dsi.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt diff --git a/Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt b/Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt new file mode 100644 index 0000000..652c0f5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt @@ -0,0 +1,36 @@ +Synopsys DesignWare MIPI DSI host controller +============================================ + +This document defines device tree properties for the Synopsys DesignWare MIPI +DSI host controller. It doesn't constitue a device tree binding specification +by itself but is meant to be referenced by platform-specific device tree +bindings. + +When referenced from platform device tree bindings the properties defined in +this document are defined as follows. The platform device tree bindings are +responsible for defining whether each property is required or optional. + +- reg: Memory mapped base address and length of the DWC MIPI DSI registers. + +- clocks: References to all the clocks specified in the clock-names property + as specified in [1]. + +- clock-names: The DWC MIPI DSI host uses the following clocks. + + - "pclk" is the peripheral clock for either AHB and APB (mandatory). + - "ref" is the pll reference clock (mandatory). + +- resets: References to all the resets specified in the reset-names property + as specified in [2]. (optional) + +- reset-names: string reset name, must be "apb" if used. (optional) + +- ports: The connectivity of the DWC MIPI DSI host controller + with the rest of the system is expressed in using ports as specified in the + device graph bindings in [3] & [4]. The numbering of the ports + is platform-specific. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/reset/reset.txt +[3] Documentation/devicetree/bindings/media/video-interfaces.txt +[4] Documentation/devicetree/bindings/graph.txt