From patchwork Thu Aug 10 09:44:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 9893115 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E7C5A60348 for ; Thu, 10 Aug 2017 09:44:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D995128968 for ; Thu, 10 Aug 2017 09:44:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CE5A02898A; Thu, 10 Aug 2017 09:44:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DC16928968 for ; Thu, 10 Aug 2017 09:44:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 58D0F6E223; Thu, 10 Aug 2017 09:44:18 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8F71D6E223 for ; Thu, 10 Aug 2017 09:44:16 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7A9iATu004149; Thu, 10 Aug 2017 04:44:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1502358250; bh=bxaidr+YgwzAt5f1DK9wAzDDWA4BQ4I6DPt38PNHID8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=h6GFk2gqcbqEJwiSa0uKrtjWA9kmvchETupLnmaauAWG552rROfh+kapSTyKZj7YL pwMOBiBGpuAVkFQPBDuqGVjjaaeXwA+7WQVqMZ/brhny/DGK5JnRFQJRuLtRwvjb/G meFl1LXPE8svR+Mx2/h8qtDDqz2Xgdse0B0gdejI= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7A9iAA4017662; Thu, 10 Aug 2017 04:44:10 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 10 Aug 2017 04:44:10 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 10 Aug 2017 04:44:09 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7A9i8cI009231; Thu, 10 Aug 2017 04:44:08 -0500 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCHv2] drm/omap: add OMAP5 DSIPHY lane-enable support Date: Thu, 10 Aug 2017 12:44:01 +0300 Message-ID: <1502358241-12374-1-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1502347520-27306-1-git-send-email-tomi.valkeinen@ti.com> References: <1502347520-27306-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: "H . Nikolaus Schaller" , Tomi Valkeinen , linux-omap@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP We are missing OMAP5 DSIPHY lane-enable support, which has prevented OMAP5 DSI working in mainline. This patch adds the lane-enable similarly to the recently added OMAP4 version. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- Changes: - Fixed the check for DSI model - Use else if - Drop the unnecessary syscon check drivers/gpu/drm/omapdrm/dss/dsi.c | 50 ++++++++++++++++++++++++++++++++------- 1 file changed, 42 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index a66d2b1a6c74..889f2d30050b 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -2109,9 +2109,6 @@ static int dsi_omap4_mux_pads(struct dsi_data *dsi, unsigned int lanes) u32 pipd_mask, pipd_shift; u32 reg; - if (!dsi->syscon) - return 0; - if (dsi->module_id == 0) { enable_mask = OMAP4_DSI1_LANEENABLE_MASK; enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT; @@ -2139,14 +2136,48 @@ static int dsi_omap4_mux_pads(struct dsi_data *dsi, unsigned int lanes) return 0; } +#define OMAP5_DSIPHY_SYSCON_OFFSET 0x74 + +#define OMAP5_DSI1_LANEENABLE_SHIFT 24 +#define OMAP5_DSI2_LANEENABLE_SHIFT 19 +#define OMAP5_DSI_LANEENABLE_MASK 0x1f + +static int dsi_omap5_mux_pads(struct dsi_data *dsi, unsigned int lanes) +{ + u32 enable_mask, enable_shift, reg; + + if (dsi->module_id == 0) + enable_shift = OMAP5_DSI1_LANEENABLE_SHIFT; + else if (dsi->module_id == 1) + enable_shift = OMAP5_DSI2_LANEENABLE_SHIFT; + else + return -ENODEV; + + enable_mask = OMAP5_DSI_LANEENABLE_MASK << enable_shift; + + regmap_read(dsi->syscon, OMAP5_DSIPHY_SYSCON_OFFSET, ®); + reg &= ~enable_mask; + reg |= (lanes << enable_shift) & enable_mask; + regmap_write(dsi->syscon, OMAP5_DSIPHY_SYSCON_OFFSET, reg); + + return 0; +} + static int dsi_enable_pads(struct dsi_data *dsi, unsigned int lane_mask) { - return dsi_omap4_mux_pads(dsi, lane_mask); + if (dsi->data->model == DSI_MODEL_OMAP4) + return dsi_omap4_mux_pads(dsi, lane_mask); + if (dsi->data->model == DSI_MODEL_OMAP5) + return dsi_omap5_mux_pads(dsi, lane_mask); + return 0; } static void dsi_disable_pads(struct dsi_data *dsi) { - dsi_omap4_mux_pads(dsi, 0); + if (dsi->data->model == DSI_MODEL_OMAP4) + dsi_omap4_mux_pads(dsi, 0); + else if (dsi->data->model == DSI_MODEL_OMAP5) + dsi_omap5_mux_pads(dsi, 0); } static int dsi_cio_init(struct platform_device *dsidev) @@ -5480,14 +5511,17 @@ static int dsi_bind(struct device *dev, struct device *master, void *data) dsi->module_id = d->id; - if (dsi->data->model == DSI_MODEL_OMAP4) { + if (dsi->data->model == DSI_MODEL_OMAP4 || + dsi->data->model == DSI_MODEL_OMAP5) { struct device_node *np; /* - * The OMAP4 display DT bindings don't reference the padconf + * The OMAP4/5 display DT bindings don't reference the padconf * syscon. Our only option to retrieve it is to find it by name. */ - np = of_find_node_by_name(NULL, "omap4_padconf_global"); + np = of_find_node_by_name(NULL, + dsi->data->model == DSI_MODEL_OMAP4 ? + "omap4_padconf_global" : "omap5_padconf_global"); if (!np) return -ENODEV;