From patchwork Mon Aug 28 09:53:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9925051 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AF60360329 for ; Mon, 28 Aug 2017 09:50:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2ABB2869C for ; Mon, 28 Aug 2017 09:50:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 93C09286A8; Mon, 28 Aug 2017 09:50:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1145F2869C for ; Mon, 28 Aug 2017 09:50:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7DB696E2B0; Mon, 28 Aug 2017 09:50:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id ACBE06E2B0 for ; Mon, 28 Aug 2017 09:50:00 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Aug 2017 02:49:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.41,441,1498546800"; d="scan'208"; a="1008312024" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 28 Aug 2017 02:49:57 -0700 From: Sagar Arun Kamble To: dri-devel@lists.freedesktop.org Subject: [PATCH libdrm 1/1] i915 perf framework changes for supporting DAPC Date: Mon, 28 Aug 2017 15:23:24 +0530 Message-Id: <1503914004-3574-1-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 Cc: Sourab Gupta , Sagar Arun Kamble X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Cc: Lionel Landwerlin Signed-off-by: Sourab Gupta Signed-off-by: Sagar Arun Kamble --- include/drm/i915_drm.h | 87 ++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 80 insertions(+), 7 deletions(-) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 5ebe046..d70f75f 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -897,6 +897,11 @@ struct drm_i915_gem_execbuffer2 { #define i915_execbuffer2_get_context_id(eb2) \ ((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK) +/* upper 32 bits of rsvd1 field contain tag */ +#define I915_EXEC_TAG_MASK (0xffffffff00000000UL) +#define i915_execbuffer2_get_tag(eb2) \ + ((eb2).rsvd1 & I915_EXEC_TAG_MASK >> 32) + struct drm_i915_gem_pin { /** Handle of the buffer to be pinned. */ __u32 handle; @@ -1293,17 +1298,34 @@ struct drm_i915_gem_context_param { }; enum drm_i915_oa_format { - I915_OA_FORMAT_A13 = 1, - I915_OA_FORMAT_A29, - I915_OA_FORMAT_A13_B8_C8, - I915_OA_FORMAT_B4_C8, - I915_OA_FORMAT_A45_B8_C8, - I915_OA_FORMAT_B4_C8_A16, - I915_OA_FORMAT_C4_B8, + I915_OA_FORMAT_A13 = 1, /* HSW only */ + I915_OA_FORMAT_A29, /* HSW only */ + I915_OA_FORMAT_A13_B8_C8, /* HSW only */ + I915_OA_FORMAT_B4_C8, /* HSW only */ + I915_OA_FORMAT_A45_B8_C8, /* HSW only */ + I915_OA_FORMAT_B4_C8_A16, /* HSW only */ + I915_OA_FORMAT_C4_B8, /* HSW+ */ + + /* Gen8+ */ + I915_OA_FORMAT_A12, + I915_OA_FORMAT_A12_B8_C8, + I915_OA_FORMAT_A32u40_A4u32_B8_C8, I915_OA_FORMAT_MAX /* non-ABI */ }; +enum drm_i915_perf_sample_oa_source { + I915_PERF_SAMPLE_OA_SOURCE_OABUFFER, + I915_PERF_SAMPLE_OA_SOURCE_RCS, + I915_PERF_SAMPLE_OA_SOURCE_MAX /* non-ABI */ +}; + +#define I915_PERF_MMIO_NUM_MAX 8 +struct drm_i915_perf_mmio_list { + __u32 num_mmio; + __u32 mmio_list[I915_PERF_MMIO_NUM_MAX]; +}; + enum drm_i915_perf_property_id { /** * Open the stream for a specific context handle (as used with @@ -1338,6 +1360,51 @@ enum drm_i915_perf_property_id { */ DRM_I915_PERF_PROP_OA_EXPONENT, + /** + * The value of this property set to 1 requests inclusion of sample + * source field to be given to userspace. The sample source field + * specifies the origin of OA report. + */ + DRM_I915_PERF_PROP_SAMPLE_OA_SOURCE, + + /** + * The value of this property specifies the GPU engine for which + * the samples need to be collected. Specifying this property also + * implies the command stream based sample collection. + */ + DRM_I915_PERF_PROP_ENGINE, + + /** + * The value of this property set to 1 requests inclusion of context ID + * in the perf sample data. + */ + DRM_I915_PERF_PROP_SAMPLE_CTX_ID, + + /** + * The value of this property set to 1 requests inclusion of pid in the + * perf sample data. + */ + DRM_I915_PERF_PROP_SAMPLE_PID, + + /** + * The value of this property set to 1 requests inclusion of tag in the + * perf sample data. + */ + DRM_I915_PERF_PROP_SAMPLE_TAG, + + /** + * The value of this property set to 1 requests inclusion of timestamp + * in the perf sample data. + */ + DRM_I915_PERF_PROP_SAMPLE_TS, + + /** + * This property requests inclusion of mmio register values in the perf + * sample data. The value of this property specifies the address of user + * struct having the register addresses. + */ + DRM_I915_PERF_PROP_SAMPLE_MMIO, + DRM_I915_PERF_PROP_MAX /* non-ABI */ }; @@ -1403,6 +1470,12 @@ enum drm_i915_perf_record_type { * struct { * struct drm_i915_perf_record_header header; * + * { u64 source; } && DRM_I915_PERF_PROP_SAMPLE_OA_SOURCE + * { u64 ctx_id; } && DRM_I915_PERF_PROP_SAMPLE_CTX_ID + * { u64 pid; } && DRM_I915_PERF_PROP_SAMPLE_PID + * { u64 tag; } && DRM_I915_PERF_PROP_SAMPLE_TAG + * { u64 timestamp; } && DRM_I915_PERF_PROP_SAMPLE_TS + * { u32 mmio[]; } && DRM_I915_PERF_PROP_SAMPLE_MMIO * { u32 oa_report[]; } && DRM_I915_PERF_PROP_SAMPLE_OA * }; */