From patchwork Fri Jan 26 21:08:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10187029 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EB345602C8 for ; Fri, 26 Jan 2018 21:09:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD5942A80F for ; Fri, 26 Jan 2018 21:09:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D22772A822; Fri, 26 Jan 2018 21:09:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 793432A80F for ; Fri, 26 Jan 2018 21:09:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0CFBF6E77F; Fri, 26 Jan 2018 21:08:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3D2536E6AA; Fri, 26 Jan 2018 21:08:57 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 239BF60A7E; Fri, 26 Jan 2018 21:08:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1517000937; bh=g6vyn5JTDcg/RiUzjHVK+Neiz+Z73O8CQTAemZBLT70=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YSmCQl3yvYCjQw7bIVkTfGFG23y71QDPGChF8uWgPAHg8dn+CA7Gp0m9VlegWGRB2 UVKoHr+WAl9JuQ5HzCFzp+J1kCgFI78QNf7uI7m2cbL4SCrpVen/fWTo9hcEUSiPH5 FOMEdcj29f7hMjxQAf7Cr0syHJVPpllIZjNsKh3U= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0B58F6047C; Fri, 26 Jan 2018 21:08:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1517000936; bh=g6vyn5JTDcg/RiUzjHVK+Neiz+Z73O8CQTAemZBLT70=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZgdEJspELTvMNuNVk/yMWC+BTzIx6z0dQGNH60xCsq6UD8+xJGXsfFIlMMJyNCXu2 mvEXIse/XpL4sWVr1T7ee6CCg1xLS7QAOhFJ3D2B9IzfAgAOId7qFStimx1zY0NsRq FXbJDVt7+qxw3DIY7wtFeReup/2stxv3rvwzOPuA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0B58F6047C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Subject: [PATCH 5/6] drm/msm/adreno: Add ringbuffer contexts to the GPU state Date: Fri, 26 Jan 2018 14:08:49 -0700 Message-Id: <1517000930-1893-6-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1517000930-1893-1-git-send-email-jcrouse@codeaurora.org> References: <1517000930-1893-1-git-send-email-jcrouse@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the contents of each ringbuffer to the GPU state and dump the data in the crash file encoded with ascii85. To save space only the used portions of the ringbuffer are saved. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 44 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 2 ++ 2 files changed, 46 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 9e83c70..79df82b 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -17,6 +17,7 @@ * this program. If not, see . */ +#include #include #include "adreno_gpu.h" #include "msm_gem.h" @@ -377,10 +378,29 @@ struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu *gpu) do_gettimeofday(&state->time); for (i = 0; i < gpu->nr_rings; i++) { + int size = 0, j; + state->ring[i].fence = gpu->rb[i]->memptrs->fence; state->ring[i].seqno = gpu->rb[i]->seqno; state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]); state->ring[i].wptr = get_wptr(gpu->rb[i]); + + /* + * Only copy used parts of the ring buffers (this should save + * data size for lightly used rings) + */ + for(j = 0; j < MSM_GPU_RINGBUFFER_SZ >> 2; j++) + if (gpu->rb[i]->start[j]) + size = j; + + if (size) { + state->ring[i].data = kmalloc((size + 1) << 2, GFP_KERNEL); + if (state->ring[i].data) { + memcpy(state->ring[i].data, gpu->rb[i]->start, + (size + 1) << 2); + state->ring[i].data_size = (size + 1) << 2; + } + } } /* Count the number of registers */ @@ -411,9 +431,13 @@ struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu *gpu) static void adreno_gpu_state_destroy(struct kref *kref) { + int i; struct msm_gpu_state *state = container_of(kref, struct msm_gpu_state, ref); + for(i = 0; i < ARRAY_SIZE(state->ring); i++) + kfree(state->ring[i].data); + kfree(state->comm); kfree(state->cmd); kfree(state->registers); @@ -453,6 +477,26 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, seq_printf(m, " retired-fence: %d\n", state->ring[i].fence); seq_printf(m, " rptr: %d\n", state->ring[i].rptr); seq_printf(m, " wptr: %d\n", state->ring[i].wptr); + seq_printf(m, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); + + if (state->ring[i].data && state->ring[i].data_size) { + u32 *ptr = (u32 *) state->ring[i].data; + char out[6]; + int len = ascii85_encode_len(state->ring[i].data_size); + int j; + + seq_printf(m, " data: !!ascii85 |\n"); + seq_printf(m, " "); + + for(j = 0; j < len; j++) { + if (ascii85_encode(ptr[j], out)) + seq_printf(m, out); + else + seq_printf(m, "z"); + } + + seq_printf(m, "\n"); + } } seq_printf(m, "registers:\n"); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 23e3b06..e13b23b 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -188,6 +188,8 @@ struct msm_gpu_state { u32 seqno; u32 rptr; u32 wptr; + void *data; + int data_size; } ring[MSM_GPU_MAX_RINGS]; int nr_registers;