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Received: from e113505-lin.cambridge.arm.com (217.140.96.140) by AM6PR08MB3032.eurprd08.prod.outlook.com (2603:10a6:209:45::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.609.10; Mon, 26 Mar 2018 17:03:51 +0000 From: Ayan Kumar Halder To: ayan.halder@arm.com, liviu.dudau@arm.com, brian.starkey@arm.com, malidp@foss.arm.com, airlied@linux.ie, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 8/8] drm/arm/malidp: Added the late system pm functions Date: Mon, 26 Mar 2018 18:03:20 +0100 Message-Id: <1522083800-30100-9-git-send-email-ayan.halder@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522083800-30100-1-git-send-email-ayan.halder@arm.com> References: <1522083800-30100-1-git-send-email-ayan.halder@arm.com> MIME-Version: 1.0 X-Originating-IP: [217.140.96.140] X-ClientProxiedBy: VI1PR0502CA0018.eurprd05.prod.outlook.com (2603:10a6:803:1::31) To AM6PR08MB3032.eurprd08.prod.outlook.com (2603:10a6:209:45::13) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 052fd72b-dcb6-448a-1ce2-08d5933b8cd3 X-Microsoft-Antispam: UriScan:; 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It sets the runtime status as suspended. Subsequently, malidp_pm_resume_early will invoke malidp_runtime_pm_resume which enables the clocks and the interrupts (previously disabled) and sets the runtime status as active. Signed-off-by: Ayan Kumar Halder Change-Id: I5f8c3d28f076314a1c9da2a46760a9c37039ccda --- drivers/gpu/drm/arm/malidp_drv.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index bd44a6d..f6124d8 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c @@ -766,8 +766,25 @@ static int __maybe_unused malidp_pm_resume(struct device *dev) return 0; } +static int __maybe_unused malidp_pm_suspend_late(struct device *dev) +{ + if (!pm_runtime_status_suspended(dev)) { + malidp_runtime_pm_suspend(dev); + pm_runtime_set_suspended(dev); + } + return 0; +} + +static int __maybe_unused malidp_pm_resume_early(struct device *dev) +{ + malidp_runtime_pm_resume(dev); + pm_runtime_set_active(dev); + return 0; +} + static const struct dev_pm_ops malidp_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(malidp_pm_suspend, malidp_pm_resume) \ + SET_LATE_SYSTEM_SLEEP_PM_OPS(malidp_pm_suspend_late, malidp_pm_resume_early) \ SET_RUNTIME_PM_OPS(malidp_runtime_pm_suspend, malidp_runtime_pm_resume, NULL) };