From patchwork Tue Apr 17 00:40:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chandan Uddaraju X-Patchwork-Id: 10344077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5DCCD60216 for ; Tue, 17 Apr 2018 00:41:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4FD4028B2A for ; Tue, 17 Apr 2018 00:41:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4DE4228B1B; Tue, 17 Apr 2018 00:41:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 51D1728B2A for ; Tue, 17 Apr 2018 00:40:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 56D946E353; Tue, 17 Apr 2018 00:40:44 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F3706E31F; Tue, 17 Apr 2018 00:40:42 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id EEE9460264; Tue, 17 Apr 2018 00:40:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1523925641; bh=BbdHP0St4P2gtjiURXxvNVV1VlV9z58LA0d7UGu7POA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fVfuoAAcrKUwyc+ZwfsqOOnfuQqiv3ipdBKu2Gz0W+u0u5NiJ+p2TdZ4aHseTnBvW g/0vmbl1iAK0lGMJETXeGwzNJuxe9VdkNC6vpUGG6Gh5UEdkkqwdct0sXmfTcLyEiT q3v3ksxiAckSUY5Kw8NNggBtDrqZc32yWpWYnjXc= Received: from linux-display-lab-03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: chandanu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B97B960264; Tue, 17 Apr 2018 00:40:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1523925641; bh=BbdHP0St4P2gtjiURXxvNVV1VlV9z58LA0d7UGu7POA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fVfuoAAcrKUwyc+ZwfsqOOnfuQqiv3ipdBKu2Gz0W+u0u5NiJ+p2TdZ4aHseTnBvW g/0vmbl1iAK0lGMJETXeGwzNJuxe9VdkNC6vpUGG6Gh5UEdkkqwdct0sXmfTcLyEiT q3v3ksxiAckSUY5Kw8NNggBtDrqZc32yWpWYnjXc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B97B960264 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=chandanu@codeaurora.org From: Chandan Uddaraju To: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [DPU PATCH v2 1/2] drm/msm/dsi: adjust dsi timing for dual dsi mode Date: Mon, 16 Apr 2018 17:40:13 -0700 Message-Id: <1523925614-28337-2-git-send-email-chandanu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1523925614-28337-1-git-send-email-chandanu@codeaurora.org> References: <1523925614-28337-1-git-send-email-chandanu@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jeykumar@quicinc.com, dri-devel@lists.freedesktop.org, hoegsberg@google.com, Chandan Uddaraju MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP For dual dsi mode, the horizontal timing needs to be divided by half since both the dsi controllers will be driving this panel. Adjust the pixel clock and DSI timing accordingly. Changes in V2: --Removed Change-Id from the commit text tags. Signed-off-by: Chandan Uddaraju --- drivers/gpu/drm/msm/dsi/dsi.h | 1 + drivers/gpu/drm/msm/dsi/dsi_host.c | 17 +++++++++++++++++ drivers/gpu/drm/msm/dsi/dsi_manager.c | 15 +++++++++++++++ 3 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index 70d9a9a..4131b47 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h @@ -161,6 +161,7 @@ void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, u32 dma_base, u32 len); int msm_dsi_host_enable(struct mipi_dsi_host *host); int msm_dsi_host_disable(struct mipi_dsi_host *host); +void msm_dsi_host_adjust_timing_config(struct mipi_dsi_host *host); int msm_dsi_host_power_on(struct mipi_dsi_host *host, struct msm_dsi_phy_shared_timings *phy_shared_timings); int msm_dsi_host_power_off(struct mipi_dsi_host *host); diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 7a03a94..66a21cb 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -2237,6 +2237,23 @@ static void msm_dsi_sfpb_config(struct msm_dsi_host *msm_host, bool enable) SFPB_GPREG_MASTER_PORT_EN(en)); } +void msm_dsi_host_adjust_timing_config(struct mipi_dsi_host *host) +{ + struct msm_dsi_host *msm_host = to_msm_dsi_host(host); + struct drm_display_mode *mode = NULL; + + mode = msm_host->mode; + + mutex_lock(&msm_host->dev_mutex); + mode->htotal >>= 1; + mode->hdisplay >>= 1; + mode->hsync_start >>= 1; + mode->hsync_end >>= 1; + + mode->clock >>= 1; + mutex_unlock(&msm_host->dev_mutex); +} + int msm_dsi_host_power_on(struct mipi_dsi_host *host, struct msm_dsi_phy_shared_timings *phy_shared_timings) { diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c index 4cb1cb6..8ef1c3d 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c @@ -627,6 +627,21 @@ static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge, msm_dsi_host_set_display_mode(host, adjusted_mode); if (is_dual_dsi && other_dsi) msm_dsi_host_set_display_mode(other_dsi->host, adjusted_mode); + + /* + * For dual DSI mode, the current DRM mode has + * the complete width of the panel. Since, the complete + * panel is driven by two DSI controllers, the + * horizontal timings and the pixel clock have to be + * split between the two dsi controllers. Adjust the + * DSI host timing structures accordingly. + */ + if (is_dual_dsi) { + msm_dsi_host_adjust_timing_config(host); + if (other_dsi) + msm_dsi_host_adjust_timing_config(other_dsi->host); + } + } static const struct drm_connector_funcs dsi_mgr_connector_funcs = {