From patchwork Wed May 23 07:42:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: huang lin X-Patchwork-Id: 10422979 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6029560327 for ; Thu, 24 May 2018 07:36:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C52128FD1 for ; Thu, 24 May 2018 07:36:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 40B3529197; Thu, 24 May 2018 07:36:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8D16028FD1 for ; Thu, 24 May 2018 07:36:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B136A6E60F; Thu, 24 May 2018 07:36:14 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pl0-f65.google.com (mail-pl0-f65.google.com [209.85.160.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 630CF6E3D0 for ; Wed, 23 May 2018 07:42:52 +0000 (UTC) Received: by mail-pl0-f65.google.com with SMTP id w19-v6so12500280plq.4 for ; Wed, 23 May 2018 00:42:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RJDD/KiVTbAn074SEhusjzoQ5wQtVYlsqeRMtdcpues=; b=drx7/1VALMUHZE+E6enNNdSHkykzVNqYHcU5SIeVxk3MmxxONWuJ7pVnO4h2Y6TSQo GMGoEOrFYH0WZ5u9svVsZqbWKop8Pz3CFVjT++rSHLVtlu50XscwNZjB9NGvRzHwvP63 YDIKwqCm1vCglpuv144Xhov5XCzSq6JOkcCplg5gCp/nqLFW3GbOQS/TjoOi+qkwS0l3 3JgIH8MnDHQlxXjUyqSUzpJkov3nbItQbtUiKtp761HYV+yrokCmPrEZQ36cF2Gjv9Ir ZzLLic3RfA7qvru9TtEktuFmb38wpt/DQK4YO1RJYPYnKx9lZbdTbAZTfkoLjZhe5bRE 1oxw== X-Gm-Message-State: ALKqPwd79tb5cJ8bPUjkHALcmoMoSZuMRB/G1ikZFBrA2/1Dd0hmXqtt 5HIxwQ2uCblHZ/sukOxzw6Q= X-Google-Smtp-Source: AB8JxZrrxxDyzBuWw8wl3fpZeP2T/cKQsrZQ0Jljzc/xQl1dsKYa8v/+i6SAFZpk/RwmpcUAuLn0tw== X-Received: by 2002:a17:902:a702:: with SMTP id w2-v6mr1841289plq.8.1527061372068; Wed, 23 May 2018 00:42:52 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id j74-v6sm41139540pfk.25.2018.05.23.00.42.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 00:42:51 -0700 (PDT) From: Lin Huang To: seanpaul@chromium.org, airlied@linux.ie, zyw@rock-chips.com, kishon@ti.com Subject: [PATCH v7 3/5] soc: rockchip: split rockchip_typec_phy struct to separate header Date: Wed, 23 May 2018 15:42:31 +0800 Message-Id: <1527061353-16902-3-git-send-email-hl@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527061353-16902-1-git-send-email-hl@rock-chips.com> References: <1527061353-16902-1-git-send-email-hl@rock-chips.com> X-Mailman-Approved-At: Thu, 24 May 2018 07:36:12 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, briannorris@chromium.org, dianders@chromium.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, daniel.vetter@intel.com, linux-arm-kernel@lists.infradead.org, Lin Huang MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP we may use rockchip_phy_typec struct in other driver, so split it to separate header. Signed-off-by: Lin Huang --- Changes in v2: - None Changes in v3: - None Changes in v4: - None Changes in v5: - None Changes in v6: - new patch here Changes in v7: - move new element to next patch drivers/phy/rockchip/phy-rockchip-typec.c | 47 +------------------------- include/soc/rockchip/rockchip_phy_typec.h | 55 +++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+), 46 deletions(-) create mode 100644 include/soc/rockchip/rockchip_phy_typec.h diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c index 76a4b58..795055f 100644 --- a/drivers/phy/rockchip/phy-rockchip-typec.c +++ b/drivers/phy/rockchip/phy-rockchip-typec.c @@ -63,6 +63,7 @@ #include #include +#include #define CMN_SSM_BANDGAP (0x21 << 2) #define CMN_SSM_BIAS (0x22 << 2) @@ -349,52 +350,6 @@ #define MODE_DFP_USB BIT(1) #define MODE_DFP_DP BIT(2) -struct usb3phy_reg { - u32 offset; - u32 enable_bit; - u32 write_enable; -}; - -/** - * struct rockchip_usb3phy_port_cfg: usb3-phy port configuration. - * @reg: the base address for usb3-phy config. - * @typec_conn_dir: the register of type-c connector direction. - * @usb3tousb2_en: the register of type-c force usb2 to usb2 enable. - * @external_psm: the register of type-c phy external psm clock. - * @pipe_status: the register of type-c phy pipe status. - * @usb3_host_disable: the register of type-c usb3 host disable. - * @usb3_host_port: the register of type-c usb3 host port. - * @uphy_dp_sel: the register of type-c phy DP select control. - */ -struct rockchip_usb3phy_port_cfg { - unsigned int reg; - struct usb3phy_reg typec_conn_dir; - struct usb3phy_reg usb3tousb2_en; - struct usb3phy_reg external_psm; - struct usb3phy_reg pipe_status; - struct usb3phy_reg usb3_host_disable; - struct usb3phy_reg usb3_host_port; - struct usb3phy_reg uphy_dp_sel; -}; - -struct rockchip_typec_phy { - struct device *dev; - void __iomem *base; - struct extcon_dev *extcon; - struct regmap *grf_regs; - struct clk *clk_core; - struct clk *clk_ref; - struct reset_control *uphy_rst; - struct reset_control *pipe_rst; - struct reset_control *tcphy_rst; - const struct rockchip_usb3phy_port_cfg *port_cfgs; - /* mutex to protect access to individual PHYs */ - struct mutex lock; - - bool flip; - u8 mode; -}; - struct phy_reg { u16 value; u32 addr; diff --git a/include/soc/rockchip/rockchip_phy_typec.h b/include/soc/rockchip/rockchip_phy_typec.h new file mode 100644 index 0000000..4afe039 --- /dev/null +++ b/include/soc/rockchip/rockchip_phy_typec.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd + * Author: Lin Huang + */ + +#ifndef __SOC_ROCKCHIP_PHY_TYPEC_H +#define __SOC_ROCKCHIP_PHY_TYPEC_H + +struct usb3phy_reg { + u32 offset; + u32 enable_bit; + u32 write_enable; +}; + +/** + * struct rockchip_usb3phy_port_cfg: usb3-phy port configuration. + * @reg: the base address for usb3-phy config. + * @typec_conn_dir: the register of type-c connector direction. + * @usb3tousb2_en: the register of type-c force usb2 to usb2 enable. + * @external_psm: the register of type-c phy external psm clock. + * @pipe_status: the register of type-c phy pipe status. + * @usb3_host_disable: the register of type-c usb3 host disable. + * @usb3_host_port: the register of type-c usb3 host port. + * @uphy_dp_sel: the register of type-c phy DP select control. + */ +struct rockchip_usb3phy_port_cfg { + unsigned int reg; + struct usb3phy_reg typec_conn_dir; + struct usb3phy_reg usb3tousb2_en; + struct usb3phy_reg external_psm; + struct usb3phy_reg pipe_status; + struct usb3phy_reg usb3_host_disable; + struct usb3phy_reg usb3_host_port; + struct usb3phy_reg uphy_dp_sel; +}; + +struct rockchip_typec_phy { + struct device *dev; + void __iomem *base; + struct extcon_dev *extcon; + struct regmap *grf_regs; + struct clk *clk_core; + struct clk *clk_ref; + struct reset_control *uphy_rst; + struct reset_control *pipe_rst; + struct reset_control *tcphy_rst; + const struct rockchip_usb3phy_port_cfg *port_cfgs; + /* mutex to protect access to individual PHYs */ + struct mutex lock; + bool flip; + u8 mode; +}; + +#endif