diff mbox

drm/fourcc: add msm compressed format modifiers

Message ID 1528250454-25949-1-git-send-email-jsanka@codeaurora.org (mailing list archive)
State New, archived
Headers show

Commit Message

Jeykumar Sankaran June 6, 2018, 2 a.m. UTC
Qualcomm Snapdragon chipsets uses compressed format
to optimize BW across multiple IP's. This change adds
needed modifier support in drm for a simple 4x4 tile
based compressed variants of base formats.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
---
 include/uapi/drm/drm_fourcc.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Eric Anholt June 21, 2018, 8:59 p.m. UTC | #1
Jeykumar Sankaran <jsanka@codeaurora.org> writes:

> Qualcomm Snapdragon chipsets uses compressed format
> to optimize BW across multiple IP's. This change adds
> needed modifier support in drm for a simple 4x4 tile
> based compressed variants of base formats.
>
> Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>

This seems like a reasonable enough description.

Reviewed-by: Eric Anholt <eric@anholt.net>
diff mbox

Patch

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index e04613d..81444e0 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -405,6 +405,19 @@ 
  */
 #define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1)
 
+/*
+ * MSM compressed format
+ *
+ * Refers to the compressed variant of a base format.
+ * Implementation may be platform and base-format specific.
+ *
+ * Each macrotile consists of m x n (mostly 4 x 4) tiles.
+ * Pixel data pitch/stride is aligned with macrotile width.
+ * Pixel data height is aligned with macrotile height.
+ * Entire pixel data buffer is aligned with 4k(bytes).
+ */
+#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
+
 #if defined(__cplusplus)
 }
 #endif