From patchwork Fri Jun 8 05:46:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sharat Masetty X-Patchwork-Id: 10453787 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DAB8F601D4 for ; Fri, 8 Jun 2018 05:47:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CAF51280FC for ; Fri, 8 Jun 2018 05:47:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BF1A2287F8; Fri, 8 Jun 2018 05:47:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 68830280FC for ; Fri, 8 Jun 2018 05:47:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C7AD06F4A8; Fri, 8 Jun 2018 05:47:03 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id B82636F4A8; Fri, 8 Jun 2018 05:47:02 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 79ED36089E; Fri, 8 Jun 2018 05:47:02 +0000 (UTC) Received: from smasetty-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: smasetty@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 575B9606FA; Fri, 8 Jun 2018 05:47:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 575B9606FA From: Sharat Masetty To: freedreno@lists.freedesktop.org Subject: [PATCH v2] drm/msm: Add OUT_RING64() helper macro Date: Fri, 8 Jun 2018 11:16:38 +0530 Message-Id: <1528436798-23560-1-git-send-email-smasetty@codeaurora.org> X-Mailer: git-send-email 1.9.1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Sharat Masetty , dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a simple helper function to help write 64 bit payloads to the ringbuffer. Signed-off-by: Sharat Masetty --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 ++++-------- drivers/gpu/drm/msm/adreno/a5xx_power.c | 3 +-- drivers/gpu/drm/msm/msm_ringbuffer.h | 6 ++++++ 3 files changed, 11 insertions(+), 10 deletions(-) -- 1.9.1 diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 5cdf104..7a58a01 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -223,8 +223,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, /* Set the save preemption record for the ring/command */ OUT_PKT4(ring, REG_A5XX_CP_CONTEXT_SWITCH_SAVE_ADDR_LO, 2); - OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id])); - OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id])); + OUT_RING64(ring, a5xx_gpu->preempt_iova[submit->ring->id]); /* Turn back on protected mode */ OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); @@ -248,8 +247,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, break; case MSM_SUBMIT_CMD_BUF: OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); - OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); - OUT_RING(ring, upper_32_bits(submit->cmd[i].iova)); + OUT_RING64(ring, submit->cmd[i].iova); OUT_RING(ring, submit->cmd[i].size); ibs++; break; @@ -282,8 +280,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, */ OUT_PKT7(ring, CP_EVENT_WRITE, 4); OUT_RING(ring, CACHE_FLUSH_TS | (1 << 31)); - OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence))); - OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence))); + OUT_RING64(ring, rbmemptr(ring, fence)); OUT_RING(ring, submit->seqno); /* Yield the floor on command completion */ @@ -469,8 +466,7 @@ static int a5xx_preempt_start(struct msm_gpu *gpu) /* Set the save preemption record for the ring/command */ OUT_PKT4(ring, REG_A5XX_CP_CONTEXT_SWITCH_SAVE_ADDR_LO, 2); - OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[ring->id])); - OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[ring->id])); + OUT_RING64(ring, a5xx_gpu->preempt_iova[ring->id]); /* Turn back on protected mode */ OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c index e9c0e56..ea5bfa5 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c @@ -190,8 +190,7 @@ static int a5xx_gpmu_init(struct msm_gpu *gpu) /* Kick off the IB to load the GPMU microcode */ OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); - OUT_RING(ring, lower_32_bits(a5xx_gpu->gpmu_iova)); - OUT_RING(ring, upper_32_bits(a5xx_gpu->gpmu_iova)); + OUT_RING64(ring, a5xx_gpu->gpmu_iova); OUT_RING(ring, a5xx_gpu->gpmu_dwords); /* Turn back on protected mode */ diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm_ringbuffer.h index cffce09..2fd8cc6 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.h +++ b/drivers/gpu/drm/msm/msm_ringbuffer.h @@ -61,4 +61,10 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, *(ring->next++) = data; } +static inline void +OUT_RING64(struct msm_ringbuffer *ring, u64 data) +{ + OUT_RING(ring, lower_32_bits(data)); + OUT_RING(ring, upper_32_bits(data)); +} #endif /* __MSM_RINGBUFFER_H__ */