From patchwork Mon Jun 11 21:13:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10458875 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0EB1D6020F for ; Mon, 11 Jun 2018 21:13:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EABAD2859A for ; Mon, 11 Jun 2018 21:13:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DF8CF285B9; Mon, 11 Jun 2018 21:13:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 823492859A for ; Mon, 11 Jun 2018 21:13:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AEC348961E; Mon, 11 Jun 2018 21:13:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 662876E3EF; Mon, 11 Jun 2018 21:13:39 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1E648608CA; Mon, 11 Jun 2018 21:13:38 +0000 (UTC) Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B89A760791; Mon, 11 Jun 2018 21:13:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B89A760791 From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [DPU PATCH v3 4/7] drm/msm/dpu: switch to drm zpos property Date: Mon, 11 Jun 2018 14:13:21 -0700 Message-Id: <1528751604-32541-5-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1528751604-32541-1-git-send-email-jsanka@codeaurora.org> References: <1528751604-32541-1-git-send-email-jsanka@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hoegsberg@google.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Replace custom plane zpos property with drm core zpos property. CRTC relies on the normalized zpos values to configure blend stages of each plane. changes in v2: - Move out unrelated changes in plane init (Sean Paul) changes in v3: - rebased on https://gitlab.freedesktop.org/seanpaul/ dpu-staging/commit/481d29d31cd629fd216381b53de5695f645465d5 Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 36 +------------------------------ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 16 +++++++++++--- 2 files changed, 14 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 7cf5a7a..a7d9aff 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -2583,24 +2583,6 @@ struct plane_state { u32 pipe_id; }; -static int pstate_cmp(const void *a, const void *b) -{ - struct plane_state *pa = (struct plane_state *)a; - struct plane_state *pb = (struct plane_state *)b; - int rc = 0; - int pa_zpos, pb_zpos; - - pa_zpos = dpu_plane_get_property(pa->dpu_pstate, PLANE_PROP_ZPOS); - pb_zpos = dpu_plane_get_property(pb->dpu_pstate, PLANE_PROP_ZPOS); - - if (pa_zpos != pb_zpos) - rc = pa_zpos - pb_zpos; - else - rc = pa->drm_pstate->crtc_x - pb->drm_pstate->crtc_x; - - return rc; -} - static int dpu_crtc_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state) { @@ -2666,8 +2648,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, pstates[cnt].dpu_pstate = to_dpu_plane_state(pstate); pstates[cnt].drm_pstate = pstate; - pstates[cnt].stage = dpu_plane_get_property( - pstates[cnt].dpu_pstate, PLANE_PROP_ZPOS); + pstates[cnt].stage = pstate->normalized_zpos; pstates[cnt].pipe_id = dpu_plane_pipe(plane); /* check dim layer stage with every plane */ @@ -2723,21 +2704,6 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, } } - /* assign mixer stages based on sorted zpos property */ - sort(pstates, cnt, sizeof(pstates[0]), pstate_cmp, NULL); - - if (!dpu_is_custom_client()) { - int stage_old = pstates[0].stage; - - z_pos = 0; - for (i = 0; i < cnt; i++) { - if (stage_old != pstates[i].stage) - ++z_pos; - stage_old = pstates[i].stage; - pstates[i].stage = z_pos; - } - } - z_pos = -1; for (i = 0; i < cnt; i++) { /* reset counts at every new blend stage */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index e81cb1f..c6be158 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -59,6 +59,7 @@ #define DPU_NAME_SIZE 12 #define DPU_PLANE_COLOR_FILL_FLAG BIT(31) +#define DPU_ZPOS_MAX 255 /* multirect rect index */ enum { @@ -1516,9 +1517,6 @@ static void _dpu_plane_install_properties(struct drm_plane *plane, /* reserve zpos == 0 for primary planes */ zpos_def = drm_plane_index(plane) + 1; } - - msm_property_install_range(&pdpu->property_info, "zpos", - 0x0, 0, zpos_max, zpos_def, PLANE_PROP_ZPOS); } static int dpu_plane_atomic_set_property(struct drm_plane *plane, @@ -1956,6 +1954,7 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev, struct msm_drm_private *priv; struct dpu_kms *kms; enum drm_plane_type type; + int zpos_max = DPU_ZPOS_MAX; int ret = -EINVAL; if (!dev) { @@ -2049,6 +2048,17 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev, pdpu->catalog = kms->catalog; + if (kms->catalog->mixer_count && + kms->catalog->mixer[0].sblk->maxblendstages) { + zpos_max = kms->catalog->mixer[0].sblk->maxblendstages - 1; + if (zpos_max > DPU_STAGE_MAX - DPU_STAGE_0 - 1) + zpos_max = DPU_STAGE_MAX - DPU_STAGE_0 - 1; + } + + ret = drm_plane_create_zpos_property(plane, 0, 0, zpos_max); + if (ret) + DPU_ERROR("failed to install zpos property, rc = %d\n", ret); + /* success! finalize initialization */ drm_plane_helper_add(plane, &dpu_plane_helper_funcs);