From patchwork Wed Aug 29 00:40:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10579383 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C448C920 for ; Wed, 29 Aug 2018 00:41:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B623D2AE09 for ; Wed, 29 Aug 2018 00:41:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A9F1E2AE4F; Wed, 29 Aug 2018 00:41:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 57B052AE46 for ; Wed, 29 Aug 2018 00:41:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 110D56E491; Wed, 29 Aug 2018 00:40:43 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 587726E487; Wed, 29 Aug 2018 00:40:39 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id F08516063F; Wed, 29 Aug 2018 00:40:26 +0000 (UTC) Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 2998160709; Wed, 29 Aug 2018 00:40:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 2998160709 From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 13/14] drm/msm/dpu: remove display H_TILE from encoder Date: Tue, 28 Aug 2018 17:40:02 -0700 Message-Id: <1535503203-22054-14-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1535503203-22054-1-git-send-email-jsanka@codeaurora.org> References: <1535503203-22054-1-git-send-email-jsanka@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hoegsberg@google.com, seanpaul@chromium.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Encoder H_TILE values are not used for allocating the hw blocks. no. of hw_intf blocks provides the info. Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 ----- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 3 --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 3 +-- 3 files changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 56ef349..bfc082d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -175,8 +175,6 @@ struct dpu_encoder_virt { spinlock_t enc_spinlock; uint32_t bus_scaling_client; - uint32_t display_num_of_h_tiles; - unsigned int num_phys_encs; struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL]; struct dpu_encoder_phys *cur_master; @@ -455,7 +453,6 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc, /* Query resources used by phys encs, expected to be without overlap */ memset(hw_res, 0, sizeof(*hw_res)); - hw_res->display_num_of_h_tiles = dpu_enc->display_num_of_h_tiles; for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; @@ -2103,8 +2100,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, WARN_ON(disp_info->num_of_h_tiles < 1); - dpu_enc->display_num_of_h_tiles = disp_info->num_of_h_tiles; - DPU_DEBUG("dsi_info->num_of_h_tiles %d\n", disp_info->num_of_h_tiles); if ((disp_info->capabilities & MSM_DISPLAY_CAP_CMD_MODE) || diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index c5600e6..e453271 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -33,13 +33,10 @@ * Encoder functions and data types * @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused * @needs_cdm: Encoder requests a CDM based on pixel format conversion needs - * @display_num_of_h_tiles: Number of horizontal tiles in case of split - * interface */ struct dpu_encoder_hw_resources { enum dpu_intf_mode intfs[INTF_MAX]; bool needs_cdm; - u32 display_num_of_h_tiles; }; /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index fbd489f..388ae65 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -813,8 +813,7 @@ static int _dpu_rm_populate_requirements( conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) reqs->top_ctrl |= BIT(DPU_RM_TOPCTL_DS); - DRM_DEBUG_KMS("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl, - reqs->hw_res.display_num_of_h_tiles); + DRM_DEBUG_KMS("top_ctrl: 0x%llX\n", reqs->top_ctrl); DRM_DEBUG_KMS("num_lm: %d num_ctl: %d split_display: %d\n", reqs->topology->num_lm, reqs->topology->num_ctl, reqs->topology->needs_split_display);