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Thu, 10 Jan 2019 08:34:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 287AB6ED83; Thu, 10 Jan 2019 08:34:17 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-eopbgr70071.outbound.protection.outlook.com [40.107.7.71]) by gabe.freedesktop.org (Postfix) with ESMTPS id D9B726F18F for ; Wed, 9 Jan 2019 14:13:49 +0000 (UTC) Received: from AM6PR04MB4007.eurprd04.prod.outlook.com (52.135.161.10) by AM6PR04MB5157.eurprd04.prod.outlook.com (20.177.34.161) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1495.9; Wed, 9 Jan 2019 14:13:48 +0000 Received: from AM6PR04MB4007.eurprd04.prod.outlook.com ([fe80::65e5:2a3b:b9a8:3cd9]) by AM6PR04MB4007.eurprd04.prod.outlook.com ([fe80::65e5:2a3b:b9a8:3cd9%5]) with mapi id 15.20.1516.010; Wed, 9 Jan 2019 14:13:48 +0000 From: Robert Chiras To: Daniel Vetter , Philipp Zabel , Marek Vasut Subject: [PATCH 08/10] drm/mxsfb: Update mxsfb to support LCD reset Thread-Topic: [PATCH 08/10] drm/mxsfb: Update mxsfb to support LCD reset Thread-Index: AQHUqCWJHvBlr2g5GUKA+eX8qEqITg== Date: Wed, 9 Jan 2019 14:13:48 +0000 Message-ID: <1547043209-8283-9-git-send-email-robert.chiras@nxp.com> References: <1547043209-8283-1-git-send-email-robert.chiras@nxp.com> In-Reply-To: <1547043209-8283-1-git-send-email-robert.chiras@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6P193CA0015.EURP193.PROD.OUTLOOK.COM (2603:10a6:209:3e::28) To AM6PR04MB4007.eurprd04.prod.outlook.com (2603:10a6:209:40::10) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.7.4 x-originating-ip: [95.76.156.53] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600109)(711020)(4618075)(2017052603328)(7153060)(7193020); SRVR:AM6PR04MB5157; x-ms-traffictypediagnostic: AM6PR04MB5157: x-microsoft-antispam-prvs: x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(8211001083)(3230021)(908002)(999002)(5005026)(6040522)(8220060)(2401047)(8121501046)(3231475)(944501520)(52105112)(3002001)(93006095)(93001095)(10201501046)(6055026)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095); SRVR:AM6PR04MB5157; BCL:0; PCL:0; RULEID:; SRVR:AM6PR04MB5157; x-forefront-prvs: 0912297777 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(396003)(39860400002)(346002)(366004)(136003)(376002)(199004)(189003)(50226002)(99286004)(11346002)(110136005)(2616005)(256004)(316002)(86362001)(5024004)(14444005)(54906003)(305945005)(7736002)(8676002)(71190400001)(6486002)(71200400001)(446003)(8936002)(105586002)(97736004)(81166006)(81156014)(36756003)(106356001)(476003)(25786009)(486006)(6436002)(186003)(3846002)(6116002)(478600001)(68736007)(53936002)(102836004)(6512007)(14454004)(5660300001)(44832011)(76176011)(52116002)(386003)(26005)(6506007)(2906002)(4326008)(66066001); DIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR04MB5157; H:AM6PR04MB4007.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 5ivm+lXrugly4E4XRqI/79L//nTds2JefWpUZ1fI9QeDs097YjK+YgUJEcxrSM+dLlEbo152b/TSMbDsS3EKlE5eqXhJBWGe6jwsGVtbJVFi5r3LHshNrKnkaEQuDjTiIxgydL+lZ9a9bmYdLkbB7UmryKsBYsnAAaG4sUWNIEhr4VDZPA4+CDn0yis8a5k7QabQoPeXsysqFn2+WgPS3prGh/oY73T//ZWGcvL1qKqVb2+zEnkmqsOwb6S4s44Q8bGhCavZPu50Bhh0SrLunSIWjCkKPhnr3ba8A7I824+uTC0RAGjsQZRuFWs7rAH4 spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: bb9c8cab-734c-43b4-eaa3-08d6763cac33 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jan 2019 14:13:47.2598 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB5157 X-Mailman-Approved-At: Thu, 10 Jan 2019 08:34:06 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anson Huang , David Airlie , "linux-kernel@vger.kernel.org" , Fabio Estevam , "dri-devel@lists.freedesktop.org" , "kernel@pengutronix.de" , Robert Chiras , Shawn Guo , dl-linux-imx Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The eLCDIF controller has control pin for the external LCD reset pin. Add support for it and assert this pin in enable and de-assert it in disable. Also, correct the pm_runtime_enable call, since it was made too early in the probe, causing issues to DRM enable routines. Signed-off-by: Robert Chiras --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 12 ++++++++++-- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 20 ++++++++------------ drivers/gpu/drm/mxsfb/mxsfb_regs.h | 1 + 3 files changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index b62b607..8d1b6a6 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -230,9 +230,12 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) clk_prepare_enable(mxsfb->clk_disp_axi); clk_prepare_enable(mxsfb->clk); - if (mxsfb->devdata->ipversion >= 4) + if (mxsfb->devdata->ipversion >= 4) { writel(CTRL2_OUTSTANDING_REQS(REQ_16), mxsfb->base + LCDC_V4_CTRL2 + REG_SET); + /* Assert LCD Reset bit */ + writel(CTRL2_LCD_RESET, mxsfb->base + LCDC_V4_CTRL2 + REG_SET); + } /* If it was disabled, re-enable the mode again */ writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); @@ -250,9 +253,12 @@ static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) { u32 reg; - if (mxsfb->devdata->ipversion >= 4) + if (mxsfb->devdata->ipversion >= 4) { writel(CTRL2_OUTSTANDING_REQS(0x7), mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); + /* De-assert LCD Reset bit */ + writel(CTRL2_LCD_RESET, mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); + } writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_CLR); @@ -346,6 +352,8 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) return; clk_set_rate(mxsfb->clk, m->crtc_clock * 1000); + DRM_DEV_DEBUG_DRIVER(drm->dev, "Pixel clock: %dkHz (actual: %dkHz)\n", + m->crtc_clock, (int)(clk_get_rate(mxsfb->clk) / 1000)); DRM_DEV_DEBUG_DRIVER(drm->dev, "Connector bus_flags: 0x%08X\n", bus_flags); diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index f528a37..135b8e1 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -287,7 +287,7 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) if (IS_ERR(mxsfb->base)) return PTR_ERR(mxsfb->base); - mxsfb->clk = devm_clk_get(drm->dev, NULL); + mxsfb->clk = devm_clk_get(drm->dev, "pix"); if (IS_ERR(mxsfb->clk)) return PTR_ERR(mxsfb->clk); @@ -303,12 +303,10 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) if (ret) return ret; - pm_runtime_enable(drm->dev); - ret = drm_vblank_init(drm, MAX_CRTCS); if (ret < 0) { dev_err(drm->dev, "Failed to initialise vblank\n"); - goto err_vblank; + return ret; } /* Modeset init */ @@ -317,7 +315,7 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) ret = mxsfb_create_output(drm); if (ret < 0) { dev_err(drm->dev, "Failed to create outputs\n"); - goto err_vblank; + return ret; } ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs, @@ -325,7 +323,7 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) mxsfb->connector); if (ret < 0) { dev_err(drm->dev, "Cannot setup simple display pipe\n"); - goto err_vblank; + return ret; } drm_crtc_vblank_off(&mxsfb->pipe.crtc); @@ -342,14 +340,14 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) ret = drm_panel_attach(mxsfb->panel, mxsfb->connector); if (ret) { dev_err(drm->dev, "Cannot connect panel\n"); - goto err_vblank; + return ret; } } else if (mxsfb->bridge) { ret = drm_simple_display_pipe_attach_bridge(&mxsfb->pipe, mxsfb->bridge); if (ret) { dev_err(drm->dev, "Cannot connect bridge\n"); - goto err_vblank; + return ret; } } @@ -369,9 +367,7 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) drm_mode_config_reset(drm); - pm_runtime_get_sync(drm->dev); ret = drm_irq_install(drm, platform_get_irq(pdev, 0)); - pm_runtime_put_sync(drm->dev); if (ret < 0) { dev_err(drm->dev, "Failed to install IRQ handler\n"); @@ -393,14 +389,14 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) drm_helper_hpd_irq_event(drm); + pm_runtime_enable(drm->dev); + return 0; err_cma: drm_irq_uninstall(drm); err_irq: drm_panel_detach(mxsfb->panel); -err_vblank: - pm_runtime_disable(drm->dev); return ret; } diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h b/drivers/gpu/drm/mxsfb/mxsfb_regs.h index 4904fdd..1d85750 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_regs.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h @@ -95,6 +95,7 @@ #define CTRL2_OUTSTANDING_REQS(x) REG_PUT((x), 23, 21) #define CTRL2_ODD_LINE_PATTERN(x) REG_PUT((x), 18, 16) #define CTRL2_EVEN_LINE_PATTERN(x) REG_PUT((x), 14, 12) +#define CTRL2_LCD_RESET BIT(0) #define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) #define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)