| Message ID | 1547184640-2100-3-git-send-email-swati2.sharma@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable Y2xx and Y4xx (xx:10/12/16 bits) packed formats for ICL | expand |
On 11.1.2019 7.30, swati2.sharma@intel.com wrote: > From: Swati Sharma <swati2.sharma@intel.com> > > Added needed plane control flag definitions for Y2xx and Y4xx (10, 12 and > 16 bits) > > Signed-off-by: Swati Sharma <swati2.sharma@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 44958d9..7150bc5 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6546,6 +6546,12 @@ enum { > #define PLANE_CTL_FORMAT_RGB_565 (14 << 24) > #define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23) > #define PLANE_CTL_PIPE_CSC_ENABLE (1 << 23) /* Pre-GLK */ > +#define PLANE_CTL_FORMAT_Y210 (1 << 23) > +#define PLANE_CTL_FORMAT_Y212 (3 << 23) > +#define PLANE_CTL_FORMAT_Y216 (5 << 23) > +#define PLANE_CTL_FORMAT_Y410 (7 << 23) > +#define PLANE_CTL_FORMAT_Y412 (9 << 23) > +#define PLANE_CTL_FORMAT_Y416 (0xb << 23) > #define PLANE_CTL_KEY_ENABLE_MASK (0x3 << 21) > #define PLANE_CTL_KEY_ENABLE_SOURCE (1 << 21) > #define PLANE_CTL_KEY_ENABLE_DESTINATION (2 << 21) > Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 44958d9..7150bc5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6546,6 +6546,12 @@ enum { #define PLANE_CTL_FORMAT_RGB_565 (14 << 24) #define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23) #define PLANE_CTL_PIPE_CSC_ENABLE (1 << 23) /* Pre-GLK */ +#define PLANE_CTL_FORMAT_Y210 (1 << 23) +#define PLANE_CTL_FORMAT_Y212 (3 << 23) +#define PLANE_CTL_FORMAT_Y216 (5 << 23) +#define PLANE_CTL_FORMAT_Y410 (7 << 23) +#define PLANE_CTL_FORMAT_Y412 (9 << 23) +#define PLANE_CTL_FORMAT_Y416 (0xb << 23) #define PLANE_CTL_KEY_ENABLE_MASK (0x3 << 21) #define PLANE_CTL_KEY_ENABLE_SOURCE (1 << 21) #define PLANE_CTL_KEY_ENABLE_DESTINATION (2 << 21)