From patchwork Wed Feb 13 13:25:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kernel test robot via dri-devel X-Patchwork-Id: 10809795 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BC2E1399 for ; Wed, 13 Feb 2019 13:29:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1A2152CDF0 for ; Wed, 13 Feb 2019 13:29:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0E8DE2CF14; Wed, 13 Feb 2019 13:29:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 278982CDF0 for ; Wed, 13 Feb 2019 13:29:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 51B7D89E65; Wed, 13 Feb 2019 13:29:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3212889E5A; Wed, 13 Feb 2019 13:29:17 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Feb 2019 05:29:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,365,1544515200"; d="scan'208";a="318662121" Received: from genxfsim-shark-bay-client-platform.iind.intel.com ([10.223.25.3]) by fmsmga006.fm.intel.com with ESMTP; 13 Feb 2019 05:29:12 -0800 To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions Date: Wed, 13 Feb 2019 18:55:28 +0530 Message-Id: <1550064333-6168-2-git-send-email-swati2.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1550064333-6168-1-git-send-email-swati2.sharma@intel.com> References: <1550064333-6168-1-git-send-email-swati2.sharma@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Swati Sharma via dri-devel From: kernel test robot via dri-devel Reply-To: Swati Sharma Cc: stanislav.lisovskiy@intel.com, narmstrong@baylibre.com, maxime.ripard@bootlin.com, daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, ayaka@soulik.info, juhapekka.heikkila@gmail.com, Swati Sharma , ayan.halder@arm.com, linux-media@vger.kernel.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Juha-Pekka Heikkila Add needed plane control flag definitions for P010, P012 and P016 formats. Signed-off-by: Juha-Pekka Heikkila Signed-off-by: Swati Sharma Reviewed-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 11bf60d..d0c5395 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6563,8 +6563,11 @@ enum { #define PLANE_CTL_FORMAT_YUV422 (0 << 24) #define PLANE_CTL_FORMAT_NV12 (1 << 24) #define PLANE_CTL_FORMAT_XRGB_2101010 (2 << 24) +#define PLANE_CTL_FORMAT_P010 (3 << 24) #define PLANE_CTL_FORMAT_XRGB_8888 (4 << 24) +#define PLANE_CTL_FORMAT_P012 (5 << 24) #define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24) +#define PLANE_CTL_FORMAT_P016 (7 << 24) #define PLANE_CTL_FORMAT_AYUV (8 << 24) #define PLANE_CTL_FORMAT_INDEXED (12 << 24) #define PLANE_CTL_FORMAT_RGB_565 (14 << 24)