| Message ID | 1553667561-25447-7-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add drm support for MT8183 | expand |
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > the format of "mtk_ddp_sout_sel"was not flexible, after we add more > mediatek SOC support, that will be redundant It looks like this patch is part of patch 'add mmsys private data for ddp path config', so I would like you squash this patch into that patch. Regards, CK > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 28 ++++++++++++++++++---------- > 1 file changed, 18 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 80dc91f..e4dafe0 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -391,20 +391,26 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, > return value; > } > > -static void mtk_ddp_sout_sel(void __iomem *config_regs, > - enum mtk_ddp_comp_id cur, > - enum mtk_ddp_comp_id next) > +static unsigned int mtk_ddp_sout_sel(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > { > + unsigned int value; > + > if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { > - writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1, > - config_regs + DISP_REG_CONFIG_OUT_SEL); > + *addr = DISP_REG_CONFIG_OUT_SEL; > + value = BLS_TO_DSI_RDMA1_TO_DPI1; > } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { > - writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI, > - config_regs + DISP_REG_CONFIG_OUT_SEL); > + *addr = DISP_REG_CONFIG_OUT_SEL; > + value = BLS_TO_DPI_RDMA1_TO_DSI; > } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) { > - writel_relaxed(DSI_SEL_IN_RDMA, > - config_regs + DISP_REG_CONFIG_DSI_SEL); > + *addr = DISP_REG_CONFIG_DSI_SEL; > + value = DSI_SEL_IN_RDMA; > + } else { > + value = 0; > } > + > + return value; > } > > void mtk_ddp_add_comp_to_path(void __iomem *config_regs, > @@ -419,7 +425,9 @@ void mtk_ddp_add_comp_to_path(void __iomem *config_regs, > writel_relaxed(reg, config_regs + addr); > } > > - mtk_ddp_sout_sel(config_regs, cur, next); > + value = mtk_ddp_sout_sel(cur, next, &addr); > + if (value) > + writel_relaxed(value, config_regs + addr); > > value = mtk_ddp_sel_in(cur, next, &addr); > if (value) {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 80dc91f..e4dafe0 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -391,20 +391,26 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, return value; } -static void mtk_ddp_sout_sel(void __iomem *config_regs, - enum mtk_ddp_comp_id cur, - enum mtk_ddp_comp_id next) +static unsigned int mtk_ddp_sout_sel(enum mtk_ddp_comp_id cur, + enum mtk_ddp_comp_id next, + unsigned int *addr) { + unsigned int value; + if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { - writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1, - config_regs + DISP_REG_CONFIG_OUT_SEL); + *addr = DISP_REG_CONFIG_OUT_SEL; + value = BLS_TO_DSI_RDMA1_TO_DPI1; } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { - writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI, - config_regs + DISP_REG_CONFIG_OUT_SEL); + *addr = DISP_REG_CONFIG_OUT_SEL; + value = BLS_TO_DPI_RDMA1_TO_DSI; } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) { - writel_relaxed(DSI_SEL_IN_RDMA, - config_regs + DISP_REG_CONFIG_DSI_SEL); + *addr = DISP_REG_CONFIG_DSI_SEL; + value = DSI_SEL_IN_RDMA; + } else { + value = 0; } + + return value; } void mtk_ddp_add_comp_to_path(void __iomem *config_regs, @@ -419,7 +425,9 @@ void mtk_ddp_add_comp_to_path(void __iomem *config_regs, writel_relaxed(reg, config_regs + addr); } - mtk_ddp_sout_sel(config_regs, cur, next); + value = mtk_ddp_sout_sel(cur, next, &addr); + if (value) + writel_relaxed(value, config_regs + addr); value = mtk_ddp_sel_in(cur, next, &addr); if (value) {