From patchwork Wed Aug 21 10:15:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Chiras X-Patchwork-Id: 11108679 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D1F3C1395 for ; Thu, 22 Aug 2019 08:15:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BADE020856 for ; Thu, 22 Aug 2019 08:15:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BADE020856 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F7D26EA74; Thu, 22 Aug 2019 08:14:57 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 527D36E948 for ; Wed, 21 Aug 2019 10:16:26 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 139502004F9; Wed, 21 Aug 2019 12:16:25 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0662220050A; Wed, 21 Aug 2019 12:16:25 +0200 (CEST) Received: from fsr-ub1664-120.ea.freescale.net (fsr-ub1664-120.ea.freescale.net [10.171.82.81]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 571E1205D3; Wed, 21 Aug 2019 12:16:24 +0200 (CEST) From: Robert Chiras To: =?utf-8?q?Guido_G=C3=BCnther?= , Marek Vasut , Stefan Agner , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam Subject: [PATCH v3 12/15] drm/mxsfb: Improve the axi clock usage Date: Wed, 21 Aug 2019 13:15:52 +0300 Message-Id: <1566382555-12102-13-git-send-email-robert.chiras@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1566382555-12102-1-git-send-email-robert.chiras@nxp.com> References: <1566382555-12102-1-git-send-email-robert.chiras@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Mailman-Approved-At: Thu, 22 Aug 2019 08:14:56 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, NXP Linux Team , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Currently, the enable of the axi clock return status is ignored, causing issues when the enable fails then we try to disable it. Therefore, it is better to check the return status and disable it only when enable succeeded. Also, remove the helper functions around clk_axi, since we can directly use the clk API function for enable/disable the clock. Those functions are already checking for NULL clk and returning 0 if that's the case. Signed-off-by: Robert Chiras Acked-by: Leonard Crestez --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 8 ++++---- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 32 +++++++++++++------------------- drivers/gpu/drm/mxsfb/mxsfb_drv.h | 3 --- 3 files changed, 17 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index a4ba368..e727f5e 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -408,7 +408,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) { dma_addr_t paddr; - mxsfb_enable_axi_clk(mxsfb); + clk_prepare_enable(mxsfb->clk_axi); writel(0, mxsfb->base + LCDC_CTRL); mxsfb_crtc_mode_set_nofb(mxsfb); @@ -425,7 +425,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) { mxsfb_disable_controller(mxsfb); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); } void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, @@ -451,8 +451,8 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, paddr = mxsfb_get_fb_paddr(mxsfb); if (paddr) { - mxsfb_enable_axi_clk(mxsfb); + clk_prepare_enable(mxsfb->clk_axi); writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); } } diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index deb5e2b..dd5809b 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -97,18 +97,6 @@ drm_pipe_to_mxsfb_drm_private(struct drm_simple_display_pipe *pipe) return container_of(pipe, struct mxsfb_drm_private, pipe); } -void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb) -{ - if (mxsfb->clk_axi) - clk_prepare_enable(mxsfb->clk_axi); -} - -void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb) -{ - if (mxsfb->clk_axi) - clk_disable_unprepare(mxsfb->clk_axi); -} - /** * mxsfb_atomic_helper_check - validate state object * @dev: DRM device @@ -272,25 +260,31 @@ static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe, static int mxsfb_pipe_enable_vblank(struct drm_simple_display_pipe *pipe) { struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); + int ret = 0; + + ret = clk_prepare_enable(mxsfb->clk_axi); + if (ret) + return ret; /* Clear and enable VBLANK IRQ */ - mxsfb_enable_axi_clk(mxsfb); writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); - return 0; + return ret; } static void mxsfb_pipe_disable_vblank(struct drm_simple_display_pipe *pipe) { struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); + if (clk_prepare_enable(mxsfb->clk_axi)) + return; + /* Disable and clear VBLANK IRQ */ - mxsfb_enable_axi_clk(mxsfb); writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); } static struct drm_simple_display_pipe_funcs mxsfb_funcs = { @@ -451,7 +445,7 @@ static irqreturn_t mxsfb_irq_handler(int irq, void *data) struct mxsfb_drm_private *mxsfb = drm->dev_private; u32 reg; - mxsfb_enable_axi_clk(mxsfb); + clk_prepare_enable(mxsfb->clk_axi); reg = readl(mxsfb->base + LCDC_CTRL1); @@ -460,7 +454,7 @@ static irqreturn_t mxsfb_irq_handler(int irq, void *data) writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); return IRQ_HANDLED; } diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.h b/drivers/gpu/drm/mxsfb/mxsfb_drv.h index a178173..54c0644 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.h @@ -39,9 +39,6 @@ struct mxsfb_drm_private { int mxsfb_setup_crtc(struct drm_device *dev); int mxsfb_create_output(struct drm_device *dev); -void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb); -void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb); - void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb); void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb); void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb,