From patchwork Thu Aug 29 11:30:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Robert Chiras X-Patchwork-Id: 11123305 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D063A14DE for ; Fri, 30 Aug 2019 08:29:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6A0021874 for ; Fri, 30 Aug 2019 08:29:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B6A0021874 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D694F6E2A0; Fri, 30 Aug 2019 08:29:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7AB8E6E0A0 for ; Thu, 29 Aug 2019 11:30:27 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3EDD820032E; Thu, 29 Aug 2019 13:30:26 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3191E200073; Thu, 29 Aug 2019 13:30:26 +0200 (CEST) Received: from fsr-ub1664-120.ea.freescale.net (fsr-ub1664-120.ea.freescale.net [10.171.82.81]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 5CAD320613; Thu, 29 Aug 2019 13:30:25 +0200 (CEST) From: Robert Chiras To: =?utf-8?q?Guido_G=C3=BCnther?= , Marek Vasut , Stefan Agner , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam Subject: [PATCH v4 10/14] drm/mxsfb: Update mxsfb to support LCD reset Date: Thu, 29 Aug 2019 14:30:11 +0300 Message-Id: <1567078215-31601-11-git-send-email-robert.chiras@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567078215-31601-1-git-send-email-robert.chiras@nxp.com> References: <1567078215-31601-1-git-send-email-robert.chiras@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP X-Mailman-Approved-At: Fri, 30 Aug 2019 08:29:17 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, NXP Linux Team , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The eLCDIF controller has control pin for the external LCD reset pin. Add support for it and assert this pin in enable and de-assert it in disable. Signed-off-by: Robert Chiras Tested-by: Guido Günther --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 14 ++++++++++---- drivers/gpu/drm/mxsfb/mxsfb_regs.h | 2 ++ 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index 1be29f5..a4ba368 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -224,9 +224,12 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) clk_prepare_enable(mxsfb->clk_disp_axi); clk_prepare_enable(mxsfb->clk); - if (mxsfb->devdata->ipversion >= 4) + if (mxsfb->devdata->ipversion >= 4) { writel(CTRL2_OUTSTANDING_REQS(REQ_16), mxsfb->base + LCDC_V4_CTRL2 + REG_SET); + /* Assert LCD Reset bit */ + writel(CTRL2_LCD_RESET, mxsfb->base + LCDC_V4_CTRL2 + REG_SET); + } /* If it was disabled, re-enable the mode again */ writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); @@ -244,11 +247,14 @@ static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) { u32 reg; - if (mxsfb->devdata->ipversion >= 4) + writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_CLR); + + if (mxsfb->devdata->ipversion >= 4) { writel(CTRL2_OUTSTANDING_REQS(0x7), mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); - - writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_CLR); + /* De-assert LCD Reset bit */ + writel(CTRL2_LCD_RESET, mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); + } /* * Even if we disable the controller here, it will still continue diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h b/drivers/gpu/drm/mxsfb/mxsfb_regs.h index dc4daa0..0f63ba1 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_regs.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h @@ -108,6 +108,8 @@ #define CTRL2_LINE_PATTERN_BGR 5 #define CTRL2_LINE_PATTERN_CLR 7 +#define CTRL2_LCD_RESET BIT(0) + #define TRANSFER_COUNT_SET_VCOUNT(x) REG_PUT((x), 31, 16) #define TRANSFER_COUNT_GET_VCOUNT(x) REG_GET((x), 31, 16) #define TRANSFER_COUNT_SET_HCOUNT(x) REG_PUT((x), 15, 0)