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a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WKVckBOS3nLgyDrtUN8LLB9WCHBUEmwcLG6GRtkBP5c=; b=eRj9K5+jIevm4zphq0P8WG9SBicO9vnVYhqNbfdiTi4HL2naptyaXI0x7XQpfFzdIIy4VSLUMJHeKN9m1fZIXHXsJ5XZ8pdYg3VLJsIp7lHNW6f1gCGpkhyjVZThsZdDXTwlb9xfXtwxRnfDp1CXkKtubEpXWGr6GKXzSKiBBBc= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Ray.Huang@amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Tuikov, Luben" , "Huang, Ray" , "Koenig, Christian" , "Liu, Aaron" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" amdgpu_ttm_tt_pte_flags will be used for updating tmz bits while the bo is secure, so we need pass the ttm_mem_reg under a buffer object. Signed-off-by: Huang Rui Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index c05638c..3663655 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1117,8 +1117,8 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) } else { /* allocate GART space */ - tmp = bo->mem; - tmp.mm_node = NULL; + tmp = bo->mem; /* cache bo->mem */ + bo->mem.mm_node = NULL; placement.num_placement = 1; placement.placement = &placements; placement.num_busy_placement = 1; @@ -1128,23 +1128,25 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM) | TTM_PL_FLAG_TT; - r = ttm_bo_mem_space(bo, &placement, &tmp, &ctx); - if (unlikely(r)) + r = ttm_bo_mem_space(bo, &placement, &bo->mem, &ctx); + if (unlikely(r)) { + bo->mem = tmp; return r; + } /* compute PTE flags for this buffer object */ - flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp); + flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &bo->mem); /* Bind pages */ - gtt->offset = (u64)tmp.start << PAGE_SHIFT; + gtt->offset = (u64)bo->mem.start << PAGE_SHIFT; r = amdgpu_ttm_gart_bind(adev, bo, flags); if (unlikely(r)) { + bo->mem = tmp; ttm_bo_mem_put(bo, &tmp); return r; } - ttm_bo_mem_put(bo, &bo->mem); - bo->mem = tmp; + ttm_bo_mem_put(bo, &tmp); } bo->offset = (bo->mem.start << PAGE_SHIFT) +