From patchwork Thu Jan 2 04:00:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongqiang Niu X-Patchwork-Id: 11315547 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C9379109A for ; Thu, 2 Jan 2020 10:58:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A32D1215A4 for ; Thu, 2 Jan 2020 10:58:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="o3jzMvp8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A32D1215A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 192FB6E044; Thu, 2 Jan 2020 10:58:16 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) by gabe.freedesktop.org (Postfix) with ESMTP id EE71F898AA for ; Thu, 2 Jan 2020 04:02:24 +0000 (UTC) X-UUID: 1bd8b0d9da7748a3b90a729d83c0162f-20200102 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=IiiRHn3R6Js4Pvfh8uoHNNErfFDcDFJoVtSH9d23T4Y=; b=o3jzMvp86ezHPjkQT3ialNLQ97VPsiPiGH0a/i0i+UFjUEZd+NyKhMgtzz23z01vGKyRx/k3g+XCkSULEVlha/a06SdzAegmxxQgKW894G6dEXzgPDvqgy2oQ6JXu4ysG6Bbq8OGP5G7HSRO9XALRHjc0WBhLgKk5Yb1fNQcOnk=; X-UUID: 1bd8b0d9da7748a3b90a729d83c0162f-20200102 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 490112433; Thu, 02 Jan 2020 12:02:22 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 2 Jan 2020 12:01:56 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 2 Jan 2020 12:01:40 +0800 From: Yongqiang Niu To: CK Hu , Philipp Zabel , Rob Herring , Matthias Brugger Subject: [PATCH v6, 09/14] drm/mediatek: add connection from OVL_2L0 to RDMA0 Date: Thu, 2 Jan 2020 12:00:19 +0800 Message-ID: <1577937624-14313-10-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1577937624-14313-1-git-send-email-yongqiang.niu@mediatek.com> References: <1577937624-14313-1-git-send-email-yongqiang.niu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Mailman-Approved-At: Thu, 02 Jan 2020 10:58:15 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" this patch add add connection from OVL_2L0 to RDMA0 Signed-off-by: Yongqiang Niu Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index bb41594..a6fed7b 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -33,6 +33,12 @@ #define DISP_REG_CONFIG_DSI_SEL 0x050 #define DISP_REG_CONFIG_DPI_SEL 0x064 +#define MT8183_DISP_OVL0_2L_MOUT_EN 0xf04 +#define MT8183_DISP_PATH0_SEL_IN 0xf24 + +#define OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0) +#define DISP_PATH0_SEL_IN_OVL0_2L 0x1 + #define MT2701_DISP_MUTEX0_MOD0 0x2c #define MT2701_DISP_MUTEX0_SOF0 0x30 @@ -308,6 +314,10 @@ static unsigned int mtk_ddp_mout_en(const struct mtk_mmsys_reg_data *data, } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0) { *addr = data->ovl0_mout_en; value = OVL0_MOUT_EN_OVL0_2L; + } else if (cur == DDP_COMPONENT_OVL_2L0 && + next == DDP_COMPONENT_RDMA0) { + *addr = MT8183_DISP_OVL0_2L_MOUT_EN; + value = OVL0_2L_MOUT_EN_DISP_PATH0; } else { value = 0; } @@ -373,6 +383,10 @@ static unsigned int mtk_ddp_sel_in(const struct mtk_mmsys_reg_data *data, } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { *addr = DISP_REG_CONFIG_DPI_SEL; value = DPI_SEL_IN_BLS; + } else if (cur == DDP_COMPONENT_OVL_2L0 && + next == DDP_COMPONENT_RDMA0) { + *addr = MT8183_DISP_PATH0_SEL_IN; + value = DISP_PATH0_SEL_IN_OVL0_2L; } else { value = 0; }