From patchwork Fri Jan 3 03:12:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongqiang Niu X-Patchwork-Id: 11317671 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2458F14BD for ; Sat, 4 Jan 2020 11:24:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 022EB217F4 for ; Sat, 4 Jan 2020 11:24:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="tevR3wR5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 022EB217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 872D76E429; Sat, 4 Jan 2020 11:23:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E8076E16D for ; Fri, 3 Jan 2020 03:12:42 +0000 (UTC) X-UUID: dd342fef9fe143bda9e34020aa4e714c-20200103 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=67ujoi8pVZStwDq+QonCDgFrIUKmjVIzemDDNIFfOI8=; b=tevR3wR5DeUd31w2EsEVh3Pkf5dWx+tGy9/oBNULR7wmekrJakn3SLUND+RGxWaYlFMScI7Y9gKzHJXq+5Hc6dNvvXqBjojSeIajkv0lK7TssKsSQ2biWpl+9/Iz5beLvicaWajt4e8u0q/jEEO4SdMO8jr1+BzoHTVM2ph0GBs=; X-UUID: dd342fef9fe143bda9e34020aa4e714c-20200103 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1971767534; Fri, 03 Jan 2020 11:12:41 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 3 Jan 2020 11:12:10 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 3 Jan 2020 11:13:08 +0800 From: Yongqiang Niu To: CK Hu , Philipp Zabel , Rob Herring , Matthias Brugger Subject: [RESEND PATCH v6 05/17] drm/mediatek: add mmsys private data for ddp path config Date: Fri, 3 Jan 2020 11:12:16 +0800 Message-ID: <1578021148-32413-6-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1578021148-32413-1-git-send-email-yongqiang.niu@mediatek.com> References: <1578021148-32413-1-git-send-email-yongqiang.niu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Mailman-Approved-At: Sat, 04 Jan 2020 11:23:45 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch add mmsys private data for ddp path config all these register offset and value will be different in future SOC add these define into mmsys private data u32 ovl0_mout_en; Signed-off-by: Yongqiang Niu --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++++ drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 37 ++++++++++++++++++++++++--------- drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 6 ++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 +++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 3 +++ 5 files changed, 43 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index e47cf84..9aacbcf 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -44,6 +44,7 @@ struct mtk_drm_crtc { bool pending_planes; struct regmap *config_regs; + const struct mtk_mmsys_reg_data *mmsys_reg_data; struct mtk_disp_mutex *mutex; unsigned int ddp_comp_nr; struct mtk_ddp_comp **ddp_comp; @@ -283,6 +284,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) DRM_DEBUG_DRIVER("mediatek_ddp_ddp_path_setup\n"); for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { mtk_ddp_add_comp_to_path(mtk_crtc->config_regs, + mtk_crtc->mmsys_reg_data, mtk_crtc->ddp_comp[i]->id, mtk_crtc->ddp_comp[i + 1]->id); mtk_disp_mutex_add_comp(mtk_crtc->mutex, @@ -340,6 +342,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) mtk_disp_mutex_disable(mtk_crtc->mutex); for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs, + mtk_crtc->mmsys_reg_data, mtk_crtc->ddp_comp[i]->id, mtk_crtc->ddp_comp[i + 1]->id); mtk_disp_mutex_remove_comp(mtk_crtc->mutex, @@ -649,6 +652,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, return -ENOMEM; mtk_crtc->config_regs = priv->config_regs; + mtk_crtc->mmsys_reg_data = priv->data->reg_data; mtk_crtc->ddp_comp_nr = path_len; mtk_crtc->ddp_comp = devm_kmalloc_array(dev, mtk_crtc->ddp_comp_nr, sizeof(*mtk_crtc->ddp_comp), diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index ae08fc4..b279204 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -168,6 +168,10 @@ struct mtk_ddp { const struct mtk_ddp_data *data; }; +struct mtk_mmsys_reg_data { + u32 ovl0_mout_en; +}; + static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_BLS] = MT2701_MUTEX_MOD_DISP_BLS, [DDP_COMPONENT_COLOR0] = MT2701_MUTEX_MOD_DISP_COLOR, @@ -246,17 +250,26 @@ struct mtk_ddp { .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0, }; -static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, +const struct mtk_mmsys_reg_data mt2701_mmsys_reg_data = { + .ovl0_mout_en = DISP_REG_CONFIG_DISP_OVL_MOUT_EN, +}; + +const struct mtk_mmsys_reg_data mt8173_mmsys_reg_data = { + .ovl0_mout_en = DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, +}; + +static unsigned int mtk_ddp_mout_en(const struct mtk_mmsys_reg_data *data, + enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next, unsigned int *addr) { unsigned int value; if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_COLOR0) { - *addr = DISP_REG_CONFIG_DISP_OVL0_MOUT_EN; + *addr = data->ovl0_mout_en; value = OVL0_MOUT_EN_COLOR0; } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_RDMA0) { - *addr = DISP_REG_CONFIG_DISP_OVL_MOUT_EN; + *addr = data->ovl0_mout_en; value = OVL_MOUT_EN_RDMA; } else if (cur == DDP_COMPONENT_OD0 && next == DDP_COMPONENT_RDMA0) { *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN; @@ -325,7 +338,8 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, return value; } -static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, +static unsigned int mtk_ddp_sel_in(const struct mtk_mmsys_reg_data *data, + enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next, unsigned int *addr) { @@ -386,7 +400,8 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, return value; } -static unsigned int mtk_ddp_sout_sel(enum mtk_ddp_comp_id cur, +static unsigned int mtk_ddp_sout_sel(const struct mtk_mmsys_reg_data *data, + enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next, unsigned int *addr) { @@ -406,35 +421,37 @@ static unsigned int mtk_ddp_sout_sel(enum mtk_ddp_comp_id cur, } void mtk_ddp_add_comp_to_path(struct regmap *config_regs, + const struct mtk_mmsys_reg_data *reg_data, enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next) { unsigned int addr, value; - value = mtk_ddp_mout_en(cur, next, &addr); + value = mtk_ddp_mout_en(reg_data, cur, next, &addr); if (value) regmap_update_bits(config_regs, addr, value, value); - value = mtk_ddp_sout_sel(cur, next, &addr); + value = mtk_ddp_sout_sel(reg_data, cur, next, &addr); if (value) regmap_update_bits(config_regs, addr, value, value); - value = mtk_ddp_sel_in(cur, next, &addr); + value = mtk_ddp_sel_in(reg_data, cur, next, &addr); if (value) regmap_update_bits(config_regs, addr, value, value); } void mtk_ddp_remove_comp_from_path(struct regmap *config_regs, + const struct mtk_mmsys_reg_data *reg_data, enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next) { unsigned int addr, value; - value = mtk_ddp_mout_en(cur, next, &addr); + value = mtk_ddp_mout_en(reg_data, cur, next, &addr); if (value) regmap_update_bits(config_regs, addr, value, 0); - value = mtk_ddp_sel_in(cur, next, &addr); + value = mtk_ddp_sel_in(reg_data, cur, next, &addr); if (value) regmap_update_bits(config_regs, addr, value, 0); } diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp.h index 01ff8b6..75fa56e 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.h @@ -11,11 +11,17 @@ struct regmap; struct device; struct mtk_disp_mutex; +struct mtk_mmsys_reg_data; + +extern const struct mtk_mmsys_reg_data mt2701_mmsys_reg_data; +extern const struct mtk_mmsys_reg_data mt8173_mmsys_reg_data; void mtk_ddp_add_comp_to_path(struct regmap *config_regs, + const struct mtk_mmsys_reg_data *reg_data, enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next); void mtk_ddp_remove_comp_from_path(struct regmap *config_regs, + const struct mtk_mmsys_reg_data *reg_data, enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index f69af42..e3293cf8 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -185,6 +185,7 @@ static int mtk_atomic_commit(struct drm_device *drm, .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), .ext_path = mt2701_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), + .reg_data = &mt2701_mmsys_reg_data, .shadow_register = true, .clk_drv_name = "clk-mt2701-mm", }; @@ -196,6 +197,7 @@ static int mtk_atomic_commit(struct drm_device *drm, .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext), .third_path = mt2712_mtk_ddp_third, .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third), + .reg_data = &mt8173_mmsys_reg_data, .clk_drv_name = "clk-mt2712-mm", }; @@ -204,6 +206,7 @@ static int mtk_atomic_commit(struct drm_device *drm, .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), .ext_path = mt8173_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), + .reg_data = &mt8173_mmsys_reg_data, .clk_drv_name = "clk-mt8173-mm", }; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index 8fe9136..9d87441 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -7,6 +7,7 @@ #define MTK_DRM_DRV_H #include +#include "mtk_drm_ddp.h" #include "mtk_drm_ddp_comp.h" #define MAX_CRTC 3 @@ -28,6 +29,8 @@ struct mtk_mmsys_driver_data { const enum mtk_ddp_comp_id *third_path; unsigned int third_len; + const struct mtk_mmsys_reg_data *reg_data; + bool shadow_register; const char *clk_drv_name; };