From patchwork Fri Jan 3 03:12:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongqiang Niu X-Patchwork-Id: 11317633 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 323EE14BD for ; Sat, 4 Jan 2020 11:24:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1133A217F4 for ; Sat, 4 Jan 2020 11:24:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="qSNn8hPn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1133A217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A9CA46E408; Sat, 4 Jan 2020 11:23:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by gabe.freedesktop.org (Postfix) with ESMTP id A6A616E174 for ; Fri, 3 Jan 2020 03:12:46 +0000 (UTC) X-UUID: b4a1266f9c484b61902f67d249bd6165-20200103 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=eP/N/Xqnko8q3f2AyJvUXJXqc2tPHfSjF4NcXhV48RI=; b=qSNn8hPn6LoapphOXcGYFTaMn8Bu6qhmzWOa6RB2IPhGfaBCVti3CEOyv8GpUIbxVmOEK0B571mu3+pAN1Fu45tPPPxiEy9HPJJl7CA+Gj+guKK0Wz1cH1xisNP1SVr4A+OS0FdBY/vqiKmabHIwXJYXMcsKFT8eJG3HjFdZObY=; X-UUID: b4a1266f9c484b61902f67d249bd6165-20200103 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 329950506; Fri, 03 Jan 2020 11:12:43 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 3 Jan 2020 11:12:12 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 3 Jan 2020 11:13:09 +0800 From: Yongqiang Niu To: CK Hu , Philipp Zabel , Rob Herring , Matthias Brugger Subject: [RESEND PATCH v6 07/17] drm/mediatek: add private data for rdma1 to dsi0 connection Date: Fri, 3 Jan 2020 11:12:18 +0800 Message-ID: <1578021148-32413-8-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1578021148-32413-1-git-send-email-yongqiang.niu@mediatek.com> References: <1578021148-32413-1-git-send-email-yongqiang.niu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Mailman-Approved-At: Sat, 04 Jan 2020 11:23:45 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" the register offset and value will be different in future SOC, add private data for rdma1->dsi0 use case. Signed-off-by: Yongqiang Niu --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 0015b35..296b157 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -174,6 +174,8 @@ struct mtk_mmsys_reg_data { u32 rdma1_sout_dpi0; u32 dpi0_sel_in; u32 dpi0_sel_in_rdma1; + u32 dsi0_sel_in; + u32 dsi0_sel_in_rdma1; }; static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { @@ -256,6 +258,8 @@ struct mtk_mmsys_reg_data { const struct mtk_mmsys_reg_data mt2701_mmsys_reg_data = { .ovl0_mout_en = DISP_REG_CONFIG_DISP_OVL_MOUT_EN, + .dsi0_sel_in = DISP_REG_CONFIG_DSI_SEL, + .dsi0_sel_in_rdma1 = DSI_SEL_IN_RDMA, }; const struct mtk_mmsys_reg_data mt8173_mmsys_reg_data = { @@ -264,6 +268,8 @@ struct mtk_mmsys_reg_data { .rdma1_sout_dpi0 = RDMA1_SOUT_DPI0, .dpi0_sel_in = DISP_REG_CONFIG_DPI_SEL_IN, .dpi0_sel_in_rdma1 = DPI0_SEL_IN_RDMA1, + .dsi0_sel_in = DISP_REG_CONFIG_DSIE_SEL_IN, + .dsi0_sel_in_rdma1 = DSI0_SEL_IN_RDMA1, }; static unsigned int mtk_ddp_mout_en(const struct mtk_mmsys_reg_data *data, @@ -363,8 +369,8 @@ static unsigned int mtk_ddp_sel_in(const struct mtk_mmsys_reg_data *data, *addr = DISP_REG_CONFIG_DPI_SEL_IN; value = DPI1_SEL_IN_RDMA1; } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) { - *addr = DISP_REG_CONFIG_DSIE_SEL_IN; - value = DSI0_SEL_IN_RDMA1; + *addr = data->dsi0_sel_in; + value = data->dsi0_sel_in_rdma1; } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI1) { *addr = DISP_REG_CONFIG_DSIO_SEL_IN; value = DSI1_SEL_IN_RDMA1;