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Wed, 12 Feb 2020 05:26:49 +0100 From: Yuti Amonkar To: , , , , , , , , , , , , Subject: [PATCH v5 3/3] drm: bridge: cdns-mhdp: add j721e wrapper Date: Wed, 12 Feb 2020 05:26:44 +0100 Message-ID: <1581481604-24499-4-git-send-email-yamonkar@cadence.com> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1581481604-24499-1-git-send-email-yamonkar@cadence.com> References: <1581481604-24499-1-git-send-email-yamonkar@cadence.com> MIME-Version: 1.0 X-OrganizationHeadersPreserved: maileu3.global.cadence.com X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:199.43.4.28; IPV:CAL; SCL:-1; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(39860400002)(136003)(376002)(36092001)(199004)(189003)(26826003)(36756003)(186003)(110136005)(5660300002)(42186006)(54906003)(316002)(478600001)(966005)(26005)(107886003)(336012)(426003)(2616005)(86362001)(6666004)(356004)(8936002)(70206006)(2906002)(4326008)(81156014)(70586007)(8676002)(81166006)(7416002)(2004002)(921003)(1121003)(83996005)(2101003); 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Ip=[199.43.4.28]; Helo=[rmmaillnx1.cadence.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR07MB4583 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-02-11_07:2020-02-11, 2020-02-11 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 bulkscore=0 malwarescore=0 phishscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 suspectscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002120031 X-Mailman-Approved-At: Wed, 12 Feb 2020 08:25:13 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mparab@cadence.com, yamonkar@cadence.com, praneeth@ti.com, jsarha@ti.com, tomi.valkeinen@ti.com, sjakhade@cadence.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add j721e wrapper for mhdp, which sets up the clock and data muxes. Signed-off-by: Yuti Amonkar Signed-off-by: Jyri Sarha Reviewed-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/Kconfig | 12 ++++ drivers/gpu/drm/bridge/Makefile | 3 + drivers/gpu/drm/bridge/cdns-mhdp-core.c | 14 +++++ drivers/gpu/drm/bridge/cdns-mhdp-core.h | 1 + drivers/gpu/drm/bridge/cdns-mhdp-j721e.c | 79 ++++++++++++++++++++++++ drivers/gpu/drm/bridge/cdns-mhdp-j721e.h | 55 +++++++++++++++++ 6 files changed, 164 insertions(+) create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.c create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.h diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index c66f2ef04f71..32e3bc5edae8 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -38,6 +38,18 @@ config DRM_CDNS_MHDP It takes a DPI stream as input and output it encoded in DP format. +if DRM_CDNS_MHDP + +config DRM_CDNS_MHDP_J721E + bool "J721E Cadence DPI/DP wrapper support" + default y + help + Support J721E Cadence DPI/DP wrapper. This is a wrapper + which adds support for J721E related platform ops. It + initializes the J721e Display Port and sets up the + clock and data muxes. +endif + config DRM_DUMB_VGA_DAC tristate "Dumb VGA DAC Bridge support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 71019088d257..7e6c64f9021f 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -21,3 +21,6 @@ obj-y += analogix/ obj-y += synopsys/ cdns-mhdp-objs := cdns-mhdp-core.o +ifeq ($(CONFIG_DRM_CDNS_MHDP_J721E),y) + cdns-mhdp-objs += cdns-mhdp-j721e.o +endif diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-core.c b/drivers/gpu/drm/bridge/cdns-mhdp-core.c index 51ed9cdee161..8483b6b1023b 100644 --- a/drivers/gpu/drm/bridge/cdns-mhdp-core.c +++ b/drivers/gpu/drm/bridge/cdns-mhdp-core.c @@ -36,8 +36,22 @@ #include "cdns-mhdp-core.h" +#include "cdns-mhdp-j721e.h" + +#ifdef CONFIG_DRM_CDNS_MHDP_J721E +static const struct mhdp_platform_ops mhdp_ti_j721e_ops = { + .init = cdns_mhdp_j721e_init, + .exit = cdns_mhdp_j721e_fini, + .enable = cdns_mhdp_j721e_enable, + .disable = cdns_mhdp_j721e_disable, +}; +#endif + static const struct of_device_id mhdp_ids[] = { { .compatible = "cdns,mhdp8546", }, +#ifdef CONFIG_DRM_CDNS_MHDP_J721E + { .compatible = "ti,j721e-mhdp8546", .data = &mhdp_ti_j721e_ops }, +#endif { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mhdp_ids); diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-core.h b/drivers/gpu/drm/bridge/cdns-mhdp-core.h index 2f3b67987832..67a99eab5db3 100644 --- a/drivers/gpu/drm/bridge/cdns-mhdp-core.h +++ b/drivers/gpu/drm/bridge/cdns-mhdp-core.h @@ -335,6 +335,7 @@ struct mhdp_platform_ops { struct cdns_mhdp_device { void __iomem *regs; + void __iomem *j721e_regs; struct device *dev; struct clk *clk; diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-j721e.c b/drivers/gpu/drm/bridge/cdns-mhdp-j721e.c new file mode 100644 index 000000000000..a87faf55c065 --- /dev/null +++ b/drivers/gpu/drm/bridge/cdns-mhdp-j721e.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * TI j721e Cadence MHDP DP wrapper + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Author: Jyri Sarha +#include + +#include "cdns-mhdp-j721e.h" + +#define REVISION 0x00 +#define DPTX_IPCFG 0x04 +#define ECC_MEM_CFG 0x08 +#define DPTX_DSC_CFG 0x0c +#define DPTX_SRC_CFG 0x10 +#define DPTX_VIF_SECURE_MODE_CFG 0x14 +#define DPTX_VIF_CONN_STATUS 0x18 +#define PHY_CLK_STATUS 0x1c + +#define DPTX_SRC_AIF_EN BIT(16) +#define DPTX_SRC_VIF_3_IN30B BIT(11) +#define DPTX_SRC_VIF_2_IN30B BIT(10) +#define DPTX_SRC_VIF_1_IN30B BIT(9) +#define DPTX_SRC_VIF_0_IN30B BIT(8) +#define DPTX_SRC_VIF_3_SEL_DPI5 BIT(7) +#define DPTX_SRC_VIF_3_SEL_DPI3 0 +#define DPTX_SRC_VIF_2_SEL_DPI4 BIT(6) +#define DPTX_SRC_VIF_2_SEL_DPI2 0 +#define DPTX_SRC_VIF_1_SEL_DPI3 BIT(5) +#define DPTX_SRC_VIF_1_SEL_DPI1 0 +#define DPTX_SRC_VIF_0_SEL_DPI2 BIT(4) +#define DPTX_SRC_VIF_0_SEL_DPI0 0 +#define DPTX_SRC_VIF_3_EN BIT(3) +#define DPTX_SRC_VIF_2_EN BIT(2) +#define DPTX_SRC_VIF_1_EN BIT(1) +#define DPTX_SRC_VIF_0_EN BIT(0) + +/* TODO turn DPTX_IPCFG fw_mem_clk_en at pm_runtime_suspend. */ + +int cdns_mhdp_j721e_init(struct cdns_mhdp_device *mhdp) +{ + struct platform_device *pdev = to_platform_device(mhdp->dev); + struct resource *regs; + + regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); + mhdp->j721e_regs = devm_ioremap_resource(&pdev->dev, regs); + if (IS_ERR(mhdp->j721e_regs)) + return PTR_ERR(mhdp->j721e_regs); + + return 0; +} + +void cdns_mhdp_j721e_fini(struct cdns_mhdp_device *mhdp) +{ +} + +void cdns_mhdp_j721e_enable(struct cdns_mhdp_device *mhdp) +{ + /* + * Eneble VIF_0 and select DPI2 as its input. DSS0 DPI0 is connected + * to eDP DPI2. This is the only supported SST configuration on + * J721E. + */ + writel(DPTX_SRC_VIF_0_EN | DPTX_SRC_VIF_0_SEL_DPI2, + mhdp->j721e_regs + DPTX_SRC_CFG); +} + +void cdns_mhdp_j721e_disable(struct cdns_mhdp_device *mhdp) +{ + /* Put everything to defaults */ + writel(0, mhdp->j721e_regs + DPTX_DSC_CFG); +} diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-j721e.h b/drivers/gpu/drm/bridge/cdns-mhdp-j721e.h new file mode 100644 index 000000000000..de0e4e82b58c --- /dev/null +++ b/drivers/gpu/drm/bridge/cdns-mhdp-j721e.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * TI j721e Cadence MHDP DP wrapper + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Author: Jyri Sarha +#include "cdns-mhdp-core.h" + +struct cdns_mhdp_j721e_wrap; + +#ifdef CONFIG_DRM_CDNS_MHDP_J721E + +int cdns_mhdp_j721e_init(struct cdns_mhdp_device *mhdp); + +void cdns_mhdp_j721e_fini(struct cdns_mhdp_device *mhdp); + +void cdns_mhdp_j721e_enable(struct cdns_mhdp_device *mhdp); + +void cdns_mhdp_j721e_disable(struct cdns_mhdp_device *mhdp); + +#else + +static inline +int cdns_mhdp_j721e_init(struct cdns_mhdp_device *mhdp) +{ + return 0; +} + +static inline +void cdns_mhdp_j721e_fini(struct cdns_mhdp_device *mhdp) +{ +} + +static inline +void cdns_mhdp_j721e_sst_enable(struct cdns_mhdp_device *mhdp); +{ +} + +static inline +void cdns_mhdp_j721e_sst_disable(struct cdns_mhdp_device *mhdp) +{ +} +#endif /* CONFIG_DRM_CDNS_MHDP_J721E */ + +#endif /* !CDNS_MHDP_J721E_H */