| Message ID | 1594136714-11650-7-git-send-email-dennis-yc.hsieh@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support cmdq helper function on mt6779 platform | expand |
On 07/07/2020 17:45, Dennis YC Hsieh wrote: > add write_s_mask_value function in cmdq helper functions which > writes a constant value to address with mask and large dma > access support. > > Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com> Now pushed to v5.9-next/soc Thanks! > --- > drivers/soc/mediatek/mtk-cmdq-helper.c | 21 +++++++++++++++++++++ > include/linux/soc/mediatek/mtk-cmdq.h | 15 +++++++++++++++ > 2 files changed, 36 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c > index 4e86b65815fc..b6e25f216605 100644 > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c > @@ -294,6 +294,27 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, > } > EXPORT_SYMBOL(cmdq_pkt_write_s_value); > > +int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, > + u16 addr_low, u32 value, u32 mask) > +{ > + struct cmdq_instruction inst = {}; > + int err; > + > + inst.op = CMDQ_CODE_MASK; > + inst.mask = ~mask; > + err = cmdq_pkt_append_command(pkt, inst); > + if (err < 0) > + return err; > + > + inst.op = CMDQ_CODE_WRITE_S_MASK; > + inst.sop = high_addr_reg_idx; > + inst.offset = addr_low; > + inst.value = value; > + > + return cmdq_pkt_append_command(pkt, inst); > +} > +EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value); > + > int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event) > { > struct cmdq_instruction inst = { {0} }; > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h > index ae73e10da274..d9390d76ee14 100644 > --- a/include/linux/soc/mediatek/mtk-cmdq.h > +++ b/include/linux/soc/mediatek/mtk-cmdq.h > @@ -165,6 +165,21 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, > u16 addr_low, u32 value); > > /** > + * cmdq_pkt_write_s_mask_value() - append write_s command with mask to the CMDQ > + * packet which write value to a physical > + * address > + * @pkt: the CMDQ packet > + * @high_addr_reg_idx: internal register ID which contains high address of pa > + * @addr_low: low address of pa > + * @value: the specified target value > + * @mask: the specified target mask > + * > + * Return: 0 for success; else the error code is returned > + */ > +int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, > + u16 addr_low, u32 value, u32 mask); > + > +/** > * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet > * @pkt: the CMDQ packet > * @event: the desired event type to "wait and CLEAR" >
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 4e86b65815fc..b6e25f216605 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -294,6 +294,27 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, } EXPORT_SYMBOL(cmdq_pkt_write_s_value); +int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, + u16 addr_low, u32 value, u32 mask) +{ + struct cmdq_instruction inst = {}; + int err; + + inst.op = CMDQ_CODE_MASK; + inst.mask = ~mask; + err = cmdq_pkt_append_command(pkt, inst); + if (err < 0) + return err; + + inst.op = CMDQ_CODE_WRITE_S_MASK; + inst.sop = high_addr_reg_idx; + inst.offset = addr_low; + inst.value = value; + + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value); + int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index ae73e10da274..d9390d76ee14 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -165,6 +165,21 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u16 addr_low, u32 value); /** + * cmdq_pkt_write_s_mask_value() - append write_s command with mask to the CMDQ + * packet which write value to a physical + * address + * @pkt: the CMDQ packet + * @high_addr_reg_idx: internal register ID which contains high address of pa + * @addr_low: low address of pa + * @value: the specified target value + * @mask: the specified target mask + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, + u16 addr_low, u32 value, u32 mask); + +/** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet * @pkt: the CMDQ packet * @event: the desired event type to "wait and CLEAR"
add write_s_mask_value function in cmdq helper functions which writes a constant value to address with mask and large dma access support. Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com> --- drivers/soc/mediatek/mtk-cmdq-helper.c | 21 +++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 15 +++++++++++++++ 2 files changed, 36 insertions(+)