| Message ID | 1600087715-15729-2-git-send-email-sjakhade@cadence.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: Add support for Cadence MHDP8546 DPI/DP bridge and J721E wrapper. | expand |
Hi Swapnil, Yuti, On 14/09/2020 15:48, Swapnil Jakhade wrote: > From: Yuti Amonkar <yamonkar@cadence.com> > > Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in > yaml format. > > Signed-off-by: Yuti Amonkar <yamonkar@cadence.com> > Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> > Reviewed-by: Rob Herring <robh@kernel.org> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > .../display/bridge/cdns,mhdp8546.yaml | 154 ++++++++++++++++++ > 1 file changed, 154 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml I was testing this on J7 EVM, and looking at the dts files and DT bindings. To get rid of the warnings from dtbs_check, I made the following changes. I think the interrupt one is clear. The driver needs the interrupt, but it was not defined in the yaml file. For phy-names, we had that in the out-of-tree dts file, so I added it here. The driver just looks for the PHY via index, but I guess we should require it. The power-domain is not needed by the driver, but if I'm not mistaken, has to be defined here. diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml index a21a4bfe15cf..c5f5781c1ed6 100644 --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml @@ -46,6 +46,16 @@ properties: description: phandle to the DisplayPort PHY. + phy-names: + items: + - const: dpphy + + power-domains: + maxItems: 1 + + interrupts: + maxItems: 1 + ports: type: object description: @@ -114,6 +124,8 @@ required: - reg - reg-names - phys + - phy-names + - interrupts - ports additionalProperties: false Tomi
Hi Tomi, > -----Original Message----- > From: Tomi Valkeinen <tomi.valkeinen@ti.com> > Sent: Wednesday, September 16, 2020 5:48 PM > To: Swapnil Kashinath Jakhade <sjakhade@cadence.com>; airlied@linux.ie; > daniel@ffwll.ch; Laurent.pinchart@ideasonboard.com; robh+dt@kernel.org; > a.hajda@samsung.com; narmstrong@baylibre.com; jonas@kwiboo.se; > jernej.skrabec@siol.net; dri-devel@lists.freedesktop.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org > Cc: Milind Parab <mparab@cadence.com>; Yuti Suresh Amonkar > <yamonkar@cadence.com>; jsarha@ti.com; nsekhar@ti.com; > praneeth@ti.com; nikhil.nd@ti.com > Subject: Re: [PATCH v10 1/3] dt-bindings: drm/bridge: Document Cadence > MHDP8546 bridge bindings > > EXTERNAL MAIL > > > Hi Swapnil, Yuti, > > On 14/09/2020 15:48, Swapnil Jakhade wrote: > > From: Yuti Amonkar <yamonkar@cadence.com> > > > > Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in > > yaml format. > > > > Signed-off-by: Yuti Amonkar <yamonkar@cadence.com> > > Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> > > Reviewed-by: Rob Herring <robh@kernel.org> > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > --- > > .../display/bridge/cdns,mhdp8546.yaml | 154 ++++++++++++++++++ > > 1 file changed, 154 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml > I was testing this on J7 EVM, and looking at the dts files and DT bindings. To > get rid of the warnings from dtbs_check, I made the following changes. > > I think the interrupt one is clear. The driver needs the interrupt, but it was > not defined in the yaml file. > > For phy-names, we had that in the out-of-tree dts file, so I added it here. The > driver just looks for the PHY via index, but I guess we should require it. > > The power-domain is not needed by the driver, but if I'm not mistaken, has > to be defined here. > > > diff --git > a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml > b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml > index a21a4bfe15cf..c5f5781c1ed6 100644 > --- > a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml > +++ > b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yam > +++ l > @@ -46,6 +46,16 @@ properties: > description: > phandle to the DisplayPort PHY. > > + phy-names: > + items: > + - const: dpphy > + > + power-domains: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > ports: > type: object > description: > @@ -114,6 +124,8 @@ required: > - reg > - reg-names > - phys > + - phy-names > + - interrupts > - ports > Okay. We will update the bindings as per above suggestions. Thanks for your inputs. Thanks & regards, Swapnil > additionalProperties: false > > Tomi > > -- > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml new file mode 100644 index 000000000000..a21a4bfe15cf --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml @@ -0,0 +1,154 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence MHDP8546 bridge + +maintainers: + - Swapnil Jakhade <sjakhade@cadence.com> + - Yuti Amonkar <yamonkar@cadence.com> + +properties: + compatible: + enum: + - cdns,mhdp8546 + - ti,j721e-mhdp8546 + + reg: + minItems: 1 + maxItems: 2 + items: + - description: + Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). + The AUX and PMA registers are not part of this range, they are instead + included in the associated PHY. + - description: + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. + + reg-names: + minItems: 1 + maxItems: 2 + items: + - const: mhdptx + - const: j721e-intg + + clocks: + maxItems: 1 + description: + DP bridge clock, used by the IP to know how to translate a number of + clock cycles into a time (which is used to comply with DP standard timings + and delays). + + phys: + maxItems: 1 + description: + phandle to the DisplayPort PHY. + + ports: + type: object + description: + Ports as described in Documentation/devicetree/bindings/graph.txt. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + type: object + description: + First input port representing the DP bridge input. + + port@1: + type: object + description: + Second input port representing the DP bridge input. + + port@2: + type: object + description: + Third input port representing the DP bridge input. + + port@3: + type: object + description: + Fourth input port representing the DP bridge input. + + port@4: + type: object + description: + Output port representing the DP bridge output. + + required: + - port@0 + - port@4 + - '#address-cells' + - '#size-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-mhdp8546 + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + +required: + - compatible + - clocks + - reg + - reg-names + - phys + - ports + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + mhdp: dp-bridge@f0fb000000 { + compatible = "cdns,mhdp8546"; + reg = <0xf0 0xfb000000 0x0 0x1000000>; + reg-names = "mhdptx"; + clocks = <&mhdp_clock>; + phys = <&dp_phy>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp_bridge_input: endpoint { + remote-endpoint = <&xxx_dpi_output>; + }; + }; + + port@4 { + reg = <4>; + dp_bridge_output: endpoint { + remote-endpoint = <&xxx_dp_connector_input>; + }; + }; + }; + }; + }; +...