diff mbox series

[1/2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for HDCP

Message ID 1614356118-21409-1-git-send-email-pthombar@cadence.com (mailing list archive)
State New, archived
Headers show
Series enable HDCP in Cadence MHDP bridge driver | expand

Commit Message

Parshuram Thombare Feb. 26, 2021, 4:15 p.m. UTC
Add binding changes for HDCP in the MHDP8546 DPI/DP bridge binding.

Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
---
 .../display/bridge/cdns,mhdp8546.yaml         | 20 +++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

Comments

Parshuram Thombare March 1, 2021, 8:49 a.m. UTC | #1
Hi Robert,

Thanks for your review comments.
I will fix this in next version of patch set.

Regards,
Parshuram Thombare

>-----Original Message-----
>From: Robert Foss <robert.foss@linaro.org>
>Sent: Friday, February 26, 2021 10:06 PM
>To: Parshuram Raju Thombare <pthombar@cadence.com>
>Cc: Rob Herring <robh+dt@kernel.org>; Laurent Pinchart
><laurent.pinchart@ideasonboard.com>; David Airlie <airlied@linux.ie>; Daniel
>Vetter <daniel@ffwll.ch>; dri-devel <dri-devel@lists.freedesktop.org>; open
>list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
><devicetree@vger.kernel.org>; linux-kernel <linux-kernel@vger.kernel.org>;
>Andrzej Hajda <a.hajda@samsung.com>; Neil Armstrong
><narmstrong@baylibre.com>; nikhil.nd@ti.com; kishon@ti.com; Swapnil
>Kashinath Jakhade <sjakhade@cadence.com>; Milind Parab
><mparab@cadence.com>
>Subject: Re: [PATCH 1/2] dt-bindings: drm/bridge: MHDP8546 bridge binding
>changes for HDCP
>
>EXTERNAL MAIL
>
>
>Hey Parshuram,
>
>Thanks for submitting this.
>
>This series rebased on upstream-drm-misc/for-linux-next fails dt
>binding verification.
>$ make dt_binding_check
>DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/bridge/cdns,mh
>dp8546.yaml
>
>
>On Fri, 26 Feb 2021 at 17:18, Parshuram Thombare <pthombar@cadence.com>
>wrote:
>>
>> Add binding changes for HDCP in the MHDP8546 DPI/DP bridge binding.
>>
>> Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
>> ---
>>  .../display/bridge/cdns,mhdp8546.yaml         | 20 +++++++++++++------
>>  1 file changed, 14 insertions(+), 6 deletions(-)
>>
>> diff --git
>a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> index 63427878715e..89b4bf783c53 100644
>> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> +++
>b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> @@ -18,7 +18,7 @@ properties:
>>
>>    reg:
>>      minItems: 1
>> -    maxItems: 2
>> +    maxItems: 3
>>      items:
>>        - description:
>>            Register block of mhdptx apb registers up to PHY mapped area
>(AUX_CONFIG_P).
>> @@ -26,13 +26,16 @@ properties:
>>            included in the associated PHY.
>>        - description:
>>            Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7
>SoCs.
>> +      - description:
>> +          Register block of mhdptx sapb registers.
>>
>>    reg-names:
>>      minItems: 1
>> -    maxItems: 2
>> +    maxItems: 3
>>      items:
>>        - const: mhdptx
>>        - const: j721e-intg
>> +      - const: mhdptx-sapb
>
>The reg & reg-names changes appear to be introducing the failure.
>
>>
>>    clocks:
>>      maxItems: 1
>> @@ -53,6 +56,11 @@ properties:
>>    power-domains:
>>      maxItems: 1
>>
>> +  hdcp-config:
>> +    maxItems: 1
>> +    description:
>> +      HDCP version supported. Bit [0]:HDCP2.2 [1]:HDCP1.4.
>> +
>>    interrupts:
>>      maxItems: 1
>>
>> @@ -98,15 +106,15 @@ allOf:
>>      then:
>>        properties:
>>          reg:
>> -          minItems: 2
>> +          minItems: 3
>>          reg-names:
>> -          minItems: 2
>> +          minItems: 3
>>      else:
>>        properties:
>>          reg:
>> -          maxItems: 1
>> +          maxItems: 2
>>          reg-names:
>> -          maxItems: 1
>> +          maxItems: 2
>>
>>  required:
>>    - compatible
>> --
>> 2.25.1
>>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
index 63427878715e..89b4bf783c53 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
@@ -18,7 +18,7 @@  properties:
 
   reg:
     minItems: 1
-    maxItems: 2
+    maxItems: 3
     items:
       - description:
           Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
@@ -26,13 +26,16 @@  properties:
           included in the associated PHY.
       - description:
           Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
+      - description:
+          Register block of mhdptx sapb registers.
 
   reg-names:
     minItems: 1
-    maxItems: 2
+    maxItems: 3
     items:
       - const: mhdptx
       - const: j721e-intg
+      - const: mhdptx-sapb
 
   clocks:
     maxItems: 1
@@ -53,6 +56,11 @@  properties:
   power-domains:
     maxItems: 1
 
+  hdcp-config:
+    maxItems: 1
+    description:
+      HDCP version supported. Bit [0]:HDCP2.2 [1]:HDCP1.4.
+
   interrupts:
     maxItems: 1
 
@@ -98,15 +106,15 @@  allOf:
     then:
       properties:
         reg:
-          minItems: 2
+          minItems: 3
         reg-names:
-          minItems: 2
+          minItems: 3
     else:
       properties:
         reg:
-          maxItems: 1
+          maxItems: 2
         reg-names:
-          maxItems: 1
+          maxItems: 2
 
 required:
   - compatible