From patchwork Fri Feb 25 15:57:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Polimera X-Patchwork-Id: 12760515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6613C433F5 for ; Fri, 25 Feb 2022 15:58:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A84B910E4EC; Fri, 25 Feb 2022 15:58:26 +0000 (UTC) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id 317B510E48A; Fri, 25 Feb 2022 15:58:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1645804705; x=1677340705; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=VDbp786rZJt995Eu/NdhIPojDHjLi2BsoWetqwF1jHE=; b=RcO54tw/jNfzYYmo7mjwEZuXSaRhXfTn2l+GG60VfceAAlyWb6ZbwfFG ENHnF3Ui9fYxiLyMSHWzGZqcA6VI2w0suGju2A2h/Mnh40xk4EbH7b788 XCxpGIxs+iX6k8hEJidUPdvoFK6vgYOAt03RhXPFAqIizrCyx5skHzk8r 8=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 25 Feb 2022 07:58:25 -0800 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 25 Feb 2022 07:58:24 -0800 X-QCInternal: smtphost Received: from vpolimer-linux.qualcomm.com ([10.204.67.235]) by ironmsg01-blr.qualcomm.com with ESMTP; 25 Feb 2022 21:28:17 +0530 Received: by vpolimer-linux.qualcomm.com (Postfix, from userid 463814) id CF14453E9; Fri, 25 Feb 2022 21:28:16 +0530 (IST) From: Vinod Polimera To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v2 2/2] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table Date: Fri, 25 Feb 2022 21:27:50 +0530 Message-Id: <1645804670-21898-3-git-send-email-quic_vpolimer@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1645804670-21898-1-git-send-email-quic_vpolimer@quicinc.com> References: <1645804670-21898-1-git-send-email-quic_vpolimer@quicinc.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: quic_kalyant@quicinc.com, dianders@chromium.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, Vinod Polimera Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" use max clock during resume sequence from the opp table. The clock will be scaled down when framework sends an update. Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes") Signed-off-by: Vinod Polimera --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index d550f90..3288f52 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1319,6 +1319,7 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev) struct drm_device *ddev; struct dss_module_power *mp = &dpu_kms->mp; int i; + unsigned long max_freq = ULONG_MAX; ddev = dpu_kms->dev; @@ -1333,6 +1334,8 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev) return rc; } + dev_pm_opp_find_freq_floor(dev, &max_freq); + dev_pm_opp_set_rate(dev, max_freq); dpu_vbif_init_memtypes(dpu_kms); drm_for_each_encoder(encoder, ddev)