Message ID | 1667996206-4153-1-git-send-email-quic_kalyant@quicinc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/4] drm/msm/disp/dpu1: pin 1 crtc to 1 encoder | expand |
On 09/11/2022 15:16, Kalyan Thota wrote: > Pin each crtc with one encoder. This arrangement will > disallow crtc switching between encoders and also will > facilitate to advertise certain features on crtc based > on encoder type. > > Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > index 7a5fabc..552a89c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > @@ -798,19 +798,19 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) > max_crtc_count = min(max_crtc_count, primary_planes_idx); > > /* Create one CRTC per encoder */ > + encoder = list_first_entry(&(dev)->mode_config.encoder_list, > + struct drm_encoder, head); Please use drm_for_each_encoder() here. > for (i = 0; i < max_crtc_count; i++) { > crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]); > - if (IS_ERR(crtc)) { > + if (IS_ERR(crtc) || IS_ERR_OR_NULL(encoder)) { Why? Not to mention that the OR_NULL part is quite frequently a mistake. > ret = PTR_ERR(crtc); > return ret; > } > priv->crtcs[priv->num_crtcs++] = crtc; > + encoder->possible_crtcs = 1 << drm_crtc_index(crtc); > + encoder = list_next_entry(encoder, head); > } > > - /* All CRTCs are compatible with all encoders */ > - drm_for_each_encoder(encoder, dev) > - encoder->possible_crtcs = (1 << priv->num_crtcs) - 1; > - > return 0; > } >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 7a5fabc..552a89c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -798,19 +798,19 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) max_crtc_count = min(max_crtc_count, primary_planes_idx); /* Create one CRTC per encoder */ + encoder = list_first_entry(&(dev)->mode_config.encoder_list, + struct drm_encoder, head); for (i = 0; i < max_crtc_count; i++) { crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]); - if (IS_ERR(crtc)) { + if (IS_ERR(crtc) || IS_ERR_OR_NULL(encoder)) { ret = PTR_ERR(crtc); return ret; } priv->crtcs[priv->num_crtcs++] = crtc; + encoder->possible_crtcs = 1 << drm_crtc_index(crtc); + encoder = list_next_entry(encoder, head); } - /* All CRTCs are compatible with all encoders */ - drm_for_each_encoder(encoder, dev) - encoder->possible_crtcs = (1 << priv->num_crtcs) - 1; - return 0; }
Pin each crtc with one encoder. This arrangement will disallow crtc switching between encoders and also will facilitate to advertise certain features on crtc based on encoder type. Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)