| Message ID | 1670432278-30643-5-git-send-email-quic_khsieh@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add data-lanes and link-frequencies to dp_out endpoint | expand |
On 07/12/2022 18:57, Kuogee Hsieh wrote: > Add capability to parser and retrieve max DP link supported rate from > link-frequencies property of dp_out endpoint. > > Changes in v6: > -- second patch after split parser patch into two patches > > Changes in v7: > -- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate > > Changes in v9: > -- separate parser link-frequencies out of data-lanes > > Changes in v10: > -- add dp_parser_link_frequencies() > > Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_parser.c | 27 +++++++++++++++++++++++++++ > drivers/gpu/drm/msm/dp/dp_parser.h | 2 ++ > 2 files changed, 29 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c > index b5f7e70..9398abe 100644 > --- a/drivers/gpu/drm/msm/dp/dp_parser.c > +++ b/drivers/gpu/drm/msm/dp/dp_parser.c > @@ -91,6 +91,28 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) > return 0; > } > > +static u32 dp_parser_link_frequencies(struct device_node *of_node) > +{ > + struct device_node *endpoint; > + u64 frequency = 0; > + int cnt = 0; > + > + endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */ if (!endpoint) return -ENODEV; (or 0, as you have u32) It's much easier IMO. > + if (endpoint) > + cnt = of_property_count_u64_elems(endpoint, "link-frequencies"); > + > + if (cnt > 0) { > + of_property_read_u64_index(endpoint, "link-frequencies", > + cnt - 1, &frequency); > + frequency /= 10; /* from symbol rate to link rate */ > + frequency /= 1000; /* kbits */ kbytes? > + } > + > + of_node_put(endpoint); Even easier: cnt = of_property_count(...); if (cnt > 0) of_property_read_u64_index(...); of_node_put(endpoint); frequency /= 10; frequency /= 1000; return frequency; > + > + return (u32)frequency; > +} > + > static int dp_parser_misc(struct dp_parser *parser) > { > struct device_node *of_node = parser->pdev->dev.of_node; > @@ -113,6 +135,11 @@ static int dp_parser_misc(struct dp_parser *parser) > parser->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */ > } > > + parser->max_dp_link_rate = dp_parser_link_frequencies(of_node); > + Drop the empty line please. The if checks the result of the previous assignment. It's easier to comprehend if they visually belong to the same code block. > + if (!parser->max_dp_link_rate) > + parser->max_dp_link_rate = DP_LINK_RATE_HBR2; /* 540000 khz */ > + > return 0; > } > > diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h > index 866c1a8..6b10c3e 100644 > --- a/drivers/gpu/drm/msm/dp/dp_parser.h > +++ b/drivers/gpu/drm/msm/dp/dp_parser.h > @@ -15,6 +15,7 @@ > #define DP_LABEL "MDSS DP DISPLAY" > #define DP_MAX_PIXEL_CLK_KHZ 675000 > #define DP_MAX_NUM_DP_LANES 4 > +#define DP_LINK_RATE_HBR2 540000 /* khz */ > > enum dp_pm_type { > DP_CORE_PM, > @@ -119,6 +120,7 @@ struct dp_parser { > struct dp_io io; > struct dp_display_data disp_data; > u32 max_dp_lanes; > + u32 max_dp_link_rate; > struct drm_bridge *next_bridge; > > int (*parse)(struct dp_parser *parser);
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index b5f7e70..9398abe 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -91,6 +91,28 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) return 0; } +static u32 dp_parser_link_frequencies(struct device_node *of_node) +{ + struct device_node *endpoint; + u64 frequency = 0; + int cnt = 0; + + endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */ + if (endpoint) + cnt = of_property_count_u64_elems(endpoint, "link-frequencies"); + + if (cnt > 0) { + of_property_read_u64_index(endpoint, "link-frequencies", + cnt - 1, &frequency); + frequency /= 10; /* from symbol rate to link rate */ + frequency /= 1000; /* kbits */ + } + + of_node_put(endpoint); + + return (u32)frequency; +} + static int dp_parser_misc(struct dp_parser *parser) { struct device_node *of_node = parser->pdev->dev.of_node; @@ -113,6 +135,11 @@ static int dp_parser_misc(struct dp_parser *parser) parser->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */ } + parser->max_dp_link_rate = dp_parser_link_frequencies(of_node); + + if (!parser->max_dp_link_rate) + parser->max_dp_link_rate = DP_LINK_RATE_HBR2; /* 540000 khz */ + return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 866c1a8..6b10c3e 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -15,6 +15,7 @@ #define DP_LABEL "MDSS DP DISPLAY" #define DP_MAX_PIXEL_CLK_KHZ 675000 #define DP_MAX_NUM_DP_LANES 4 +#define DP_LINK_RATE_HBR2 540000 /* khz */ enum dp_pm_type { DP_CORE_PM, @@ -119,6 +120,7 @@ struct dp_parser { struct dp_io io; struct dp_display_data disp_data; u32 max_dp_lanes; + u32 max_dp_link_rate; struct drm_bridge *next_bridge; int (*parse)(struct dp_parser *parser);
Add capability to parser and retrieve max DP link supported rate from link-frequencies property of dp_out endpoint. Changes in v6: -- second patch after split parser patch into two patches Changes in v7: -- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate Changes in v9: -- separate parser link-frequencies out of data-lanes Changes in v10: -- add dp_parser_link_frequencies() Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> --- drivers/gpu/drm/msm/dp/dp_parser.c | 27 +++++++++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_parser.h | 2 ++ 2 files changed, 29 insertions(+)