| Message ID | 1677774797-31063-14-git-send-email-quic_vpolimer@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add PSR support for eDP | expand |
> -----Original Message----- > From: Vinod Polimera (QUIC) <quic_vpolimer@quicinc.com> > Sent: Thursday, March 2, 2023 10:03 PM > To: dri-devel@lists.freedesktop.org; linux-arm-msm@vger.kernel.org; > freedreno@lists.freedesktop.org; devicetree@vger.kernel.org > Cc: Vinod Polimera (QUIC) <quic_vpolimer@quicinc.com>; linux- > kernel@vger.kernel.org; robdclark@gmail.com; dianders@chromium.org; > swboyd@chromium.org; Kalyan Thota (QUIC) <quic_kalyant@quicinc.com>; > dmitry.baryshkov@linaro.org; Kuogee Hsieh (QUIC) > <quic_khsieh@quicinc.com>; Vishnuvardhan Prodduturi (QUIC) > <quic_vproddut@quicinc.com>; Bjorn Andersson (QUIC) > <quic_bjorande@quicinc.com>; Abhinav Kumar (QUIC) > <quic_abhinavk@quicinc.com>; Sankeerth Billakanti (QUIC) > <quic_sbillaka@quicinc.com> > Subject: [PATCH v14 13/14] drm/msm/disp/dpu: update dpu_enc crtc state > on crtc enable/disable during self refresh > > Populate the enocder software structure to reflect the updated > crtc appropriately during crtc enable/disable for a new commit > while taking care of the self refresh transitions when crtc > disable is triggered from the drm self refresh library. > > Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Adding the RB tag which was reviewed by Dmitry on V13. > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 29 > +++++++++++++++++++++++++---- > 1 file changed, 25 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > index 60e5984..b1ec0c3 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > @@ -1022,8 +1022,17 @@ static void dpu_crtc_disable(struct drm_crtc *crtc, > > DRM_DEBUG_KMS("crtc%d\n", crtc->base.id); > > - if (old_crtc_state->self_refresh_active) > + /* If disable is triggered while in self refresh mode, > + * reset the encoder software state so that in enable > + * it won't trigger a warn while assigning crtc. > + */ > + if (old_crtc_state->self_refresh_active) { > + drm_for_each_encoder_mask(encoder, crtc->dev, > + old_crtc_state->encoder_mask) { > + dpu_encoder_assign_crtc(encoder, NULL); > + } > return; > + } > > /* Disable/save vblank irq handling */ > drm_crtc_vblank_off(crtc); > @@ -1036,7 +1045,14 @@ static void dpu_crtc_disable(struct drm_crtc *crtc, > */ > if (dpu_encoder_get_intf_mode(encoder) == > INTF_MODE_VIDEO) > release_bandwidth = true; > - dpu_encoder_assign_crtc(encoder, NULL); > + > + /* > + * If disable is triggered during psr active(e.g: screen dim in > PSR), > + * we will need encoder->crtc connection to process the > device sleep & > + * preserve it during psr sequence. > + */ > + if (!crtc->state->self_refresh_active) > + dpu_encoder_assign_crtc(encoder, NULL); > } > > /* wait for frame_event_done completion */ > @@ -1084,6 +1100,9 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, > struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); > struct drm_encoder *encoder; > bool request_bandwidth = false; > + struct drm_crtc_state *old_crtc_state; > + > + old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); > > pm_runtime_get_sync(crtc->dev->dev); > > @@ -1106,8 +1125,10 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, > trace_dpu_crtc_enable(DRMID(crtc), true, dpu_crtc); > dpu_crtc->enabled = true; > > - drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state- > >encoder_mask) > - dpu_encoder_assign_crtc(encoder, crtc); > + if (!old_crtc_state->self_refresh_active) { > + drm_for_each_encoder_mask(encoder, crtc->dev, crtc- > >state->encoder_mask) > + dpu_encoder_assign_crtc(encoder, crtc); > + } > > /* Enable/restore vblank irq handling */ > drm_crtc_vblank_on(crtc); > -- > 2.7.4
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 60e5984..b1ec0c3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1022,8 +1022,17 @@ static void dpu_crtc_disable(struct drm_crtc *crtc, DRM_DEBUG_KMS("crtc%d\n", crtc->base.id); - if (old_crtc_state->self_refresh_active) + /* If disable is triggered while in self refresh mode, + * reset the encoder software state so that in enable + * it won't trigger a warn while assigning crtc. + */ + if (old_crtc_state->self_refresh_active) { + drm_for_each_encoder_mask(encoder, crtc->dev, + old_crtc_state->encoder_mask) { + dpu_encoder_assign_crtc(encoder, NULL); + } return; + } /* Disable/save vblank irq handling */ drm_crtc_vblank_off(crtc); @@ -1036,7 +1045,14 @@ static void dpu_crtc_disable(struct drm_crtc *crtc, */ if (dpu_encoder_get_intf_mode(encoder) == INTF_MODE_VIDEO) release_bandwidth = true; - dpu_encoder_assign_crtc(encoder, NULL); + + /* + * If disable is triggered during psr active(e.g: screen dim in PSR), + * we will need encoder->crtc connection to process the device sleep & + * preserve it during psr sequence. + */ + if (!crtc->state->self_refresh_active) + dpu_encoder_assign_crtc(encoder, NULL); } /* wait for frame_event_done completion */ @@ -1084,6 +1100,9 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); struct drm_encoder *encoder; bool request_bandwidth = false; + struct drm_crtc_state *old_crtc_state; + + old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); pm_runtime_get_sync(crtc->dev->dev); @@ -1106,8 +1125,10 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, trace_dpu_crtc_enable(DRMID(crtc), true, dpu_crtc); dpu_crtc->enabled = true; - drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) - dpu_encoder_assign_crtc(encoder, crtc); + if (!old_crtc_state->self_refresh_active) { + drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) + dpu_encoder_assign_crtc(encoder, crtc); + } /* Enable/restore vblank irq handling */ drm_crtc_vblank_on(crtc);
Populate the enocder software structure to reflect the updated crtc appropriately during crtc enable/disable for a new commit while taking care of the self refresh transitions when crtc disable is triggered from the drm self refresh library. Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-)